Commit b340ff27 authored by Adrian Alonso's avatar Adrian Alonso Committed by Abel Vesa
Browse files

clk: imx: imx8mn: add sai7_ipg_clk clock settings 



Add IMX8MN_CLK_SAI7_IPG clock entry.

Reviewed-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarAdrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Reviewed-by: default avatarAbel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240607133347.3291040-10-peng.fan@oss.nxp.com


Signed-off-by: default avatarAbel Vesa <abel.vesa@linaro.org>
parent fcc2a79a

drivers/clk/imx/clk-imx8mn.c

+1 −0
Original line number Diff line number Diff line
@@ -583,6 +583,7 @@ static int imx8mn_clocks_probe(struct platform_device *pdev) 
	hws[IMX8MN_CLK_SDMA2_ROOT] = imx_clk_hw_gate4("sdma2_clk", "ipg_audio_root", base + 0x43b0, 0);

	hws[IMX8MN_CLK_SDMA3_ROOT] = imx_clk_hw_gate4("sdma3_clk", "ipg_audio_root", base + 0x45f0, 0);

	hws[IMX8MN_CLK_SAI7_ROOT] = imx_clk_hw_gate2_shared2("sai7_root_clk", "sai7", base + 0x4650, 0, &share_count_sai7);

	hws[IMX8MN_CLK_SAI7_IPG] = imx_clk_hw_gate2_shared2("sai7_ipg_clk", "ipg_audio_root", base + 0x4650, 0, &share_count_sai7);



	hws[IMX8MN_CLK_GPT_3M] = imx_clk_hw_fixed_factor("gpt_3m", "osc_24m", 1, 8);