Commit b35ea78a authored by Chang S. Bae's avatar Chang S. Bae Committed by Rafael J. Wysocki
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cpufreq: ACPI: Simplify MSR read on the boot CPU



Replace the 32-bit MSR access function with a 64-bit variant to simplify
the call site, eliminating unnecessary 32-bit value manipulations.

Signed-off-by: default avatarChang S. Bae <chang.seok.bae@intel.com>
Link: https://patch.msgid.link/20241106182313.165297-1-chang.seok.bae@intel.com


[ rjw: Subject edit ]
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 70d8b648
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+2 −5
Original line number Diff line number Diff line
@@ -73,20 +73,17 @@ static unsigned int acpi_pstate_strict;

static bool boost_state(unsigned int cpu)
{
	u32 lo, hi;
	u64 msr;

	switch (boot_cpu_data.x86_vendor) {
	case X86_VENDOR_INTEL:
	case X86_VENDOR_CENTAUR:
	case X86_VENDOR_ZHAOXIN:
		rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
		msr = lo | ((u64)hi << 32);
		rdmsrl_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &msr);
		return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
	case X86_VENDOR_HYGON:
	case X86_VENDOR_AMD:
		rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
		msr = lo | ((u64)hi << 32);
		rdmsrl_on_cpu(cpu, MSR_K7_HWCR, &msr);
		return !(msr & MSR_K7_HWCR_CPB_DIS);
	}
	return false;