Commit b4c69d47 authored by Linus Walleij's avatar Linus Walleij Committed by Bartosz Golaszewski
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dt-bindings: gpio-mmio: Add ngpios property 



This adds the ngpios property to MMIO GPIO. We restrict the
property to 1..63 since there is no point in 0 GPIO lines and
we support up to 64bits wide registers for now.

Acked-by: default avatarRob Herring (Arm) <robh@kernel.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20241017-gpio-ngpios-v2-1-cecfdb38d40e@linaro.org


Signed-off-by: default avatarBartosz Golaszewski <bartosz.golaszewski@linaro.org>
parent 678eefc1

Documentation/devicetree/bindings/gpio/gpio-mmio.yaml

+12 −1
Original line number Diff line number Diff line
@@ -37,7 +37,8 @@ properties: 
    description:

      A list of registers in the controller. The width of each register is

      determined by its size. All registers must have the same width. The number

      of GPIOs is set by the width, with bit 0 corresponding to GPIO 0.

      of GPIOs is set by the width, with bit 0 corresponding to GPIO 0, unless

      the ngpios property further restricts the number of used lines.

    items:

      - description:

          Register to READ the value of the GPIO lines. If GPIO line is high,
@@ -74,6 +75,15 @@ properties: 


  native-endian: true



  ngpios:

    minimum: 1

    maximum: 63

    description:

      If this property is present the number of usable GPIO lines are restricted

      to the first 0 .. ngpios lines. This is useful when the GPIO MMIO register

      has 32 bits for GPIO but only the first 12 are actually connected to

      real electronics, and then we set ngpios to 12.



  no-output:

    $ref: /schemas/types.yaml#/definitions/flag

    description:
@@ -111,6 +121,7 @@ examples: 
      compatible = "brcm,bcm6345-gpio";

      reg-names = "dirout", "dat";

      reg = <0xfffe0406 2>, <0xfffe040a 2>;

      ngpios = <15>;

      native-endian;

      gpio-controller;

      #gpio-cells = <2>;