Commit b4e05bb1 authored Jan 03, 2024 by Ilya Bakoulin Committed by Alex Deucher Jan 15, 2024

drm/amd/display: Clear OPTC mem select on disable



[Why]
Not clearing the memory select bits prior to OPTC disable can cause DSC
corruption issues when attempting to reuse a memory instance for another
OPTC that enables ODM.

[How]
Clear the memory select bits prior to disabling an OPTC.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ilya Bakoulin <ilya.bakoulin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 3fc39411

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -173,6 +173,9 @@ static bool optc32_disable_crtc(struct timing_generator *optc)
		OPTC_SEG3_SRC_SEL, 0xf,
		OPTC_NUM_OF_INPUT_SEGMENT, 0);

		REG_UPDATE(OPTC_MEMORY_CONFIG,
		OPTC_MEM_SEL, 0);

		/* disable otg request until end of the first line
		* in the vertical blank region
		*/

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -145,6 +145,9 @@ static bool optc35_disable_crtc(struct timing_generator *optc)
		OPTC_SEG3_SRC_SEL, 0xf,
		OPTC_NUM_OF_INPUT_SEGMENT, 0);

		REG_UPDATE(OPTC_MEMORY_CONFIG,
		OPTC_MEM_SEL, 0);

		/* disable otg request until end of the first line
		* in the vertical blank region
		*/