Commit b56d1caf authored by Thomas Bogendoerfer's avatar Thomas Bogendoerfer
Browse files

MIPS: remove asm/war.h 



The major part for workaround handling has already moved to config
options. This change replaces the remaining defines by already
available config options and gets rid of war.h

Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent c47c7ab9

arch/mips/Kconfig

+38 −0
Original line number Diff line number Diff line
@@ -2521,13 +2521,51 @@ config CPU_HAS_SYNC 
#

# CPU non-features

#



# Work around the "daddi" and "daddiu" CPU errata:

#

# - The `daddi' instruction fails to trap on overflow.

#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",

#   erratum #23

#

# - The `daddiu' instruction can produce an incorrect result.

#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",

#   erratum #41

#   "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum

#   #15

#   "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7

#   "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5

config CPU_DADDI_WORKAROUNDS

	bool



# Work around certain R4000 CPU errata (as implemented by GCC):

#

# - A double-word or a variable shift may give an incorrect result

#   if executed immediately after starting an integer division:

#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",

#   erratum #28

#   "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum

#   #19

#

# - A double-word or a variable shift may give an incorrect result

#   if executed while an integer multiplication is in progress:

#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",

#   errata #16 & #28

#

# - An integer division may give an incorrect result if started in

#   a delay slot of a taken branch or a jump:

#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",

#   erratum #52

config CPU_R4000_WORKAROUNDS

	bool

	select CPU_R4400_WORKAROUNDS



# Work around certain R4400 CPU errata (as implemented by GCC):

#

# - A double-word or a variable shift may give an incorrect result

#   if executed immediately after starting an integer division:

#   "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10

#   "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4

config CPU_R4400_WORKAROUNDS

	bool

arch/mips/include/asm/futex.h

+0 −1
Original line number Diff line number Diff line
@@ -17,7 +17,6 @@ 
#include <asm/compiler.h>

#include <asm/errno.h>

#include <asm/sync.h>

#include <asm/war.h>



#define arch_futex_atomic_op_inuser arch_futex_atomic_op_inuser

#define futex_atomic_cmpxchg_inatomic futex_atomic_cmpxchg_inatomic

arch/mips/include/asm/mipsmtregs.h

+0 −1
Original line number Diff line number Diff line
@@ -9,7 +9,6 @@ 
#define _ASM_MIPSMTREGS_H



#include <asm/mipsregs.h>

#include <asm/war.h>



#ifndef __ASSEMBLY__

arch/mips/include/asm/mipsregs.h

+0 −1
Original line number Diff line number Diff line
@@ -17,7 +17,6 @@ 
#include <linux/types.h>

#include <asm/hazards.h>

#include <asm/isa-rev.h>

#include <asm/war.h>



/*

 * The following macros are especially useful for __asm__

arch/mips/include/asm/war.h

deleted100644 → 0
+0 −73
Original line number Diff line number Diff line 
/*

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle

 * Copyright (C) 2007  Maciej W. Rozycki

 */

#ifndef _ASM_WAR_H

#define _ASM_WAR_H



/*

 * Work around certain R4000 CPU errata (as implemented by GCC):

 *

 * - A double-word or a variable shift may give an incorrect result

 *   if executed immediately after starting an integer division:

 *   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",

 *   erratum #28

 *   "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum

 *   #19

 *

 * - A double-word or a variable shift may give an incorrect result

 *   if executed while an integer multiplication is in progress:

 *   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",

 *   errata #16 & #28

 *

 * - An integer division may give an incorrect result if started in

 *   a delay slot of a taken branch or a jump:

 *   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",

 *   erratum #52

 */

#ifdef CONFIG_CPU_R4000_WORKAROUNDS

#define R4000_WAR 1

#else

#define R4000_WAR 0

#endif



/*

 * Work around certain R4400 CPU errata (as implemented by GCC):

 *

 * - A double-word or a variable shift may give an incorrect result

 *   if executed immediately after starting an integer division:

 *   "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10

 *   "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4

 */

#ifdef CONFIG_CPU_R4400_WORKAROUNDS

#define R4400_WAR 1

#else

#define R4400_WAR 0

#endif



/*

 * Work around the "daddi" and "daddiu" CPU errata:

 *

 * - The `daddi' instruction fails to trap on overflow.

 *   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",

 *   erratum #23

 *

 * - The `daddiu' instruction can produce an incorrect result.

 *   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",

 *   erratum #41

 *   "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum

 *   #15

 *   "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7

 *   "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5

 */

#ifdef CONFIG_CPU_DADDI_WORKAROUNDS

#define DADDI_WAR 1

#else

#define DADDI_WAR 0

#endif



#endif /* _ASM_WAR_H */