Commit b6a072a1 authored by Subbaraya Sundeep's avatar Subbaraya Sundeep Committed by David S. Miller
Browse files

octeontx2-af: Enable LBK links only when switch mode is on. 



Currently, all the TL3_TL2 nodes are being configured to enable
switch LBK channel 63 in them. Instead enable them only when switch
mode is enabled.

Signed-off-by: default avatarSubbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: default avatarNaveen Mamindlapalli <naveenm@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent bbba125e

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

+2 −0
Original line number Diff line number Diff line
@@ -806,6 +806,8 @@ int rvu_get_nix_blkaddr(struct rvu *rvu, u16 pcifunc); 
int nix_get_dwrr_mtu_reg(struct rvu_hwinfo *hw, int smq_link_type);

u32 convert_dwrr_mtu_to_bytes(u8 dwrr_mtu);

u32 convert_bytes_to_dwrr_mtu(u32 bytes);

void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr, u16 pcifunc,

			struct nix_txsch *txsch, bool enable);



/* NPC APIs */

void rvu_npc_freemem(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

+5 −6
Original line number Diff line number Diff line
@@ -2460,17 +2460,19 @@ static int nix_txschq_cfg_read(struct rvu *rvu, struct nix_hw *nix_hw, 
	return 0;

}



static void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr,

			       u16 pcifunc, struct nix_txsch *txsch)

void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr, u16 pcifunc,

			struct nix_txsch *txsch, bool enable)

{

	struct rvu_hwinfo *hw = rvu->hw;

	int lbk_link_start, lbk_links;

	u8 pf = rvu_get_pf(pcifunc);

	int schq;

	u64 cfg;



	if (!is_pf_cgxmapped(rvu, pf))

		return;



	cfg = enable ? (BIT_ULL(12) | RVU_SWITCH_LBK_CHAN) : 0;

	lbk_link_start = hw->cgx_links;



	for (schq = 0; schq < txsch->schq.max; schq++) {
@@ -2484,8 +2486,7 @@ static void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr, 
			rvu_write64(rvu, blkaddr,

				    NIX_AF_TL3_TL2X_LINKX_CFG(schq,

							      lbk_link_start +

							      lbk_links),

				    BIT_ULL(12) | RVU_SWITCH_LBK_CHAN);

							      lbk_links), cfg);

	}

}
@@ -2591,8 +2592,6 @@ int rvu_mbox_handler_nix_txschq_cfg(struct rvu *rvu, 
		rvu_write64(rvu, blkaddr, reg, regval);

	}



	rvu_nix_tx_tl2_cfg(rvu, blkaddr, pcifunc,

			   &nix_hw->txsch[NIX_TXSCH_LVL_TL2]);

	return 0;

}

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

+18 −0
Original line number Diff line number Diff line
@@ -8,6 +8,17 @@ 
#include <linux/bitfield.h>

#include "rvu.h"



static void rvu_switch_enable_lbk_link(struct rvu *rvu, u16 pcifunc, bool enable)

{

	struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

	struct nix_hw *nix_hw;



	nix_hw = get_nix_hw(rvu->hw, pfvf->nix_blkaddr);

	/* Enable LBK links with channel 63 for TX MCAM rule */

	rvu_nix_tx_tl2_cfg(rvu, pfvf->nix_blkaddr, pcifunc,

			   &nix_hw->txsch[NIX_TXSCH_LVL_TL2], enable);

}



static int rvu_switch_install_rx_rule(struct rvu *rvu, u16 pcifunc,

				      u16 chan_mask)

{
@@ -52,6 +63,8 @@ static int rvu_switch_install_tx_rule(struct rvu *rvu, u16 pcifunc, u16 entry) 
	if (!test_bit(NIXLF_INITIALIZED, &pfvf->flags))

		return 0;



	rvu_switch_enable_lbk_link(rvu, pcifunc, true);



	lbkid = pfvf->nix_blkaddr == BLKADDR_NIX0 ? 0 : 1;

	ether_addr_copy(req.packet.dmac, pfvf->mac_addr);

	eth_broadcast_addr((u8 *)&req.mask.dmac);
@@ -218,6 +231,9 @@ void rvu_switch_disable(struct rvu *rvu) 
				"Reverting RX rule for PF%d failed(%d)\n",

				pf, err);



		/* Disable LBK link */

		rvu_switch_enable_lbk_link(rvu, pcifunc, false);



		rvu_get_pf_numvfs(rvu, pf, &numvfs, NULL);

		for (vf = 0; vf < numvfs; vf++) {

			pcifunc = pf << 10 | ((vf + 1) & 0x3FF);
@@ -226,6 +242,8 @@ void rvu_switch_disable(struct rvu *rvu) 
				dev_err(rvu->dev,

					"Reverting RX rule for PF%dVF%d failed(%d)\n",

					pf, vf, err);



			rvu_switch_enable_lbk_link(rvu, pcifunc, false);

		}

	}