Commit b6b41cf3 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: fix default dpm state setup 



Only enable the first levels for mclk and sclk.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 36654dd4

drivers/gpu/drm/radeon/ci_dpm.c

+5 −3
Original line number Diff line number Diff line
@@ -3062,7 +3062,8 @@ static int ci_setup_default_dpm_tables(struct radeon_device *rdev) 
		     allowed_sclk_vddc_table->entries[i].clk)) {

			pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value =

				allowed_sclk_vddc_table->entries[i].clk;

			pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled = true;

			pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled =

				(i == 0) ? true : false;

			pi->dpm_table.sclk_table.count++;

		}

	}
@@ -3074,7 +3075,8 @@ static int ci_setup_default_dpm_tables(struct radeon_device *rdev) 
		     allowed_mclk_table->entries[i].clk)) {

			pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value =

				allowed_mclk_table->entries[i].clk;

			pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled = true;

			pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled =

				(i == 0) ? true : false;

			pi->dpm_table.mclk_table.count++;

		}

	}