Loading arch/arm/boot/dts/sun4i-a10.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -208,7 +208,7 @@ uart1_pins_a: uart1@0 { }; timer@01c20c00 { compatible = "allwinner,sunxi-timer"; compatible = "allwinner,sun4i-timer"; reg = <0x01c20c00 0x90>; interrupts = <22>; clocks = <&osc24M>; Loading arch/arm/boot/dts/sun5i-a13.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -202,7 +202,7 @@ uart1_pins_b: uart1@1 { }; timer@01c20c00 { compatible = "allwinner,sunxi-timer"; compatible = "allwinner,sun4i-timer"; reg = <0x01c20c00 0x90>; interrupts = <22>; clocks = <&osc24M>; Loading Loading
arch/arm/boot/dts/sun4i-a10.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -208,7 +208,7 @@ uart1_pins_a: uart1@0 { }; timer@01c20c00 { compatible = "allwinner,sunxi-timer"; compatible = "allwinner,sun4i-timer"; reg = <0x01c20c00 0x90>; interrupts = <22>; clocks = <&osc24M>; Loading
arch/arm/boot/dts/sun5i-a13.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -202,7 +202,7 @@ uart1_pins_b: uart1@1 { }; timer@01c20c00 { compatible = "allwinner,sunxi-timer"; compatible = "allwinner,sun4i-timer"; reg = <0x01c20c00 0x90>; interrupts = <22>; clocks = <&osc24M>; Loading