Commit b82f0759 authored by Bhuvanachandra Pinninti's avatar Bhuvanachandra Pinninti Committed by Alex Deucher
Browse files

drm/amd/display: Migrate DIO registers access from hwseq to dio component. 



[why]
Direct DIO registers access in hwseq layer was creating register conflicts.

[how]
Migrated DIO registers from hwseq to dio component.

Reviewed-by: default avatarJun Lei <Jun.Lei@amd.com>
Signed-off-by: default avatarBhuvanachandra Pinninti <bpinnint@amd.com>
Signed-off-by: default avatarWayne Lin <wayne.lin@amd.com>
Tested-by: default avatarDan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c2d2ccc8

drivers/gpu/drm/amd/display/dc/dio/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@ ifdef CONFIG_DRM_AMD_DC_FP 
###############################################################################

# DCN10

###############################################################################

DIO_DCN10 = dcn10_link_encoder.o dcn10_stream_encoder.o

DIO_DCN10 = dcn10_link_encoder.o dcn10_stream_encoder.o dcn10_dio.o



AMD_DAL_DIO_DCN10 = $(addprefix $(AMDDALPATH)/dc/dio/dcn10/,$(DIO_DCN10))

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_dio.c

0 → 100644
+47 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: MIT

//

// Copyright 2025 Advanced Micro Devices, Inc.



#include "dc_hw_types.h"

#include "dm_services.h"

#include "reg_helper.h"

#include "dcn10_dio.h"



#define CTX \

	dio10->base.ctx

#define REG(reg)\

	dio10->regs->reg



#undef FN

#define FN(reg_name, field_name) \

	dio10->shifts->field_name, dio10->masks->field_name



static void dcn10_dio_mem_pwr_ctrl(struct dio *dio, bool enable_i2c_light_sleep)

{

	struct dcn10_dio *dio10 = TO_DCN10_DIO(dio);



	/* power AFMT HDMI memory */

	REG_WRITE(DIO_MEM_PWR_CTRL, 0);



	if (enable_i2c_light_sleep)

		REG_UPDATE(DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, 1);

}



static const struct dio_funcs dcn10_dio_funcs = {

	.mem_pwr_ctrl = dcn10_dio_mem_pwr_ctrl,

};



void dcn10_dio_construct(

	struct dcn10_dio *dio10,

	struct dc_context *ctx,

	const struct dcn_dio_registers *regs,

	const struct dcn_dio_shift *shifts,

	const struct dcn_dio_mask *masks)

{

	dio10->base.ctx = ctx;

	dio10->base.funcs = &dcn10_dio_funcs;



	dio10->regs = regs;

	dio10->shifts = shifts;

	dio10->masks = masks;

}

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_dio.h

0 → 100644
+42 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: MIT

//

// Copyright 2025 Advanced Micro Devices, Inc.



#ifndef __DCN10_DIO_H__

#define __DCN10_DIO_H__



#include "dio.h"



#define TO_DCN10_DIO(dio_base) \

	container_of(dio_base, struct dcn10_dio, base)



#define DIO_REG_LIST_DCN10()\

	SR(DIO_MEM_PWR_CTRL)



struct dcn_dio_registers {

	uint32_t DIO_MEM_PWR_CTRL;

};



struct dcn_dio_shift {

	uint8_t I2C_LIGHT_SLEEP_FORCE;

};



struct dcn_dio_mask {

	uint32_t I2C_LIGHT_SLEEP_FORCE;

};



struct dcn10_dio {

	struct dio base;

	const struct dcn_dio_registers *regs;

	const struct dcn_dio_shift *shifts;

	const struct dcn_dio_mask *masks;

};



void dcn10_dio_construct(

	struct dcn10_dio *dio10,

	struct dc_context *ctx,

	const struct dcn_dio_registers *regs,

	const struct dcn_dio_shift *shifts,

	const struct dcn_dio_mask *masks);



#endif /* __DCN10_DIO_H__ */

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

+3 −1
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ 
#include "link_hwss.h"

#include "dpcd_defs.h"

#include "dsc.h"

#include "dio/dcn10/dcn10_dio.h"

#include "dce/dmub_psr.h"

#include "dc_dmub_srv.h"

#include "dce/dmub_hw_lock_mgr.h"
@@ -1881,7 +1882,8 @@ void dcn10_init_hw(struct dc *dc) 


	/* power AFMT HDMI memory TODO: may move to dis/en output save power*/

	if (!is_optimized_init_done)

		REG_WRITE(DIO_MEM_PWR_CTRL, 0);

		if (dc->res_pool->dio && dc->res_pool->dio->funcs->mem_pwr_ctrl)

			dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, false);



	if (!dc->debug.disable_clock_gate) {

		/* enable all DCN clock gating */

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

+4 −1
Original line number Diff line number Diff line
@@ -40,6 +40,8 @@ 
#include "clk_mgr.h"

#include "reg_helper.h"

#include "dcn10/dcn10_hubbub.h"

#include "dio/dcn10/dcn10_dio.h"





#define CTX \

	hws->ctx
@@ -360,7 +362,8 @@ void dcn201_init_hw(struct dc *dc) 
	}



	/* power AFMT HDMI memory TODO: may move to dis/en output save power*/

	REG_WRITE(DIO_MEM_PWR_CTRL, 0);

	if (dc->res_pool->dio && dc->res_pool->dio->funcs->mem_pwr_ctrl)

		dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, false);



	if (!dc->debug.disable_clock_gate) {

		/* enable all DCN clock gating */