Commit b8b92c1b authored by Melissa Wen's avatar Melissa Wen Committed by Alex Deucher
Browse files

drm/amd/display: add plane CTM driver-specific property 



Plane CTM for pre-blending color space conversion. Only enable
driver-specific plane CTM property on drivers that support both pre- and
post-blending gamut remap matrix, i.e., DCN3+ family. Otherwise it
conflits with DRM CRTC CTM property.

Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarMelissa Wen <mwen@igalia.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cb19dc4a

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

+2 −0
Original line number Diff line number Diff line
@@ -364,6 +364,8 @@ struct amdgpu_mode_info { 
	 * @plane_hdr_mult_property:

	 */

	struct drm_property *plane_hdr_mult_property;



	struct drm_property *plane_ctm_property;

	/**

	 * @shaper_lut_property: Plane property to set pre-blending shaper LUT

	 * that converts color content before 3D LUT. If

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

+7 −0
Original line number Diff line number Diff line
@@ -784,6 +784,13 @@ struct dm_plane_state { 
	 * TF is needed for any subsequent linear-to-non-linear transforms.

	 */

	__u64 hdr_mult;

	/**

	 * @ctm:

	 *

	 * Color transformation matrix. The blob (if not NULL) is a &struct

	 * drm_color_ctm_3x4.

	 */

	struct drm_property_blob *ctm;

	/**

	 * @shaper_lut: shaper lookup table blob. The blob (if not NULL) is an

	 * array of &struct drm_color_lut.

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

+7 −0
Original line number Diff line number Diff line
@@ -240,6 +240,13 @@ amdgpu_dm_create_color_properties(struct amdgpu_device *adev) 
		return -ENOMEM;

	adev->mode_info.plane_hdr_mult_property = prop;



	prop = drm_property_create(adev_to_drm(adev),

				   DRM_MODE_PROP_BLOB,

				   "AMD_PLANE_CTM", 0);

	if (!prop)

		return -ENOMEM;

	adev->mode_info.plane_ctm_property = prop;



	prop = drm_property_create(adev_to_drm(adev),

				   DRM_MODE_PROP_BLOB,

				   "AMD_PLANE_SHAPER_LUT", 0);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

+21 −0
Original line number Diff line number Diff line
@@ -1366,6 +1366,9 @@ static struct drm_plane_state *amdgpu_dm_plane_drm_plane_duplicate_state(struct 
	if (old_dm_plane_state->degamma_lut)

		dm_plane_state->degamma_lut =

			drm_property_blob_get(old_dm_plane_state->degamma_lut);

	if (old_dm_plane_state->ctm)

		dm_plane_state->ctm =

			drm_property_blob_get(old_dm_plane_state->ctm);

	if (old_dm_plane_state->shaper_lut)

		dm_plane_state->shaper_lut =

			drm_property_blob_get(old_dm_plane_state->shaper_lut);
@@ -1450,6 +1453,8 @@ static void amdgpu_dm_plane_drm_plane_destroy_state(struct drm_plane *plane, 


	if (dm_plane_state->degamma_lut)

		drm_property_blob_put(dm_plane_state->degamma_lut);

	if (dm_plane_state->ctm)

		drm_property_blob_put(dm_plane_state->ctm);

	if (dm_plane_state->lut3d)

		drm_property_blob_put(dm_plane_state->lut3d);

	if (dm_plane_state->shaper_lut)
@@ -1490,6 +1495,11 @@ dm_atomic_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm, 
				   dm->adev->mode_info.plane_hdr_mult_property,

				   AMDGPU_HDR_MULT_DEFAULT);



	/* Only enable plane CTM if both DPP and MPC gamut remap is available. */

	if (dm->dc->caps.color.mpc.gamut_remap)

		drm_object_attach_property(&plane->base,

					   dm->adev->mode_info.plane_ctm_property, 0);



	if (dpp_color_caps.hw_3d_lut) {

		drm_object_attach_property(&plane->base,

					   mode_info.plane_shaper_lut_property, 0);
@@ -1547,6 +1557,14 @@ dm_atomic_plane_set_property(struct drm_plane *plane, 
			dm_plane_state->hdr_mult = val;

			dm_plane_state->base.color_mgmt_changed = 1;

		}

	} else if (property == adev->mode_info.plane_ctm_property) {

		ret = drm_property_replace_blob_from_id(plane->dev,

							&dm_plane_state->ctm,

							val,

							sizeof(struct drm_color_ctm), -1,

							&replaced);

		dm_plane_state->base.color_mgmt_changed |= replaced;

		return ret;

	} else if (property == adev->mode_info.plane_shaper_lut_property) {

		ret = drm_property_replace_blob_from_id(plane->dev,

							&dm_plane_state->shaper_lut,
@@ -1608,6 +1626,9 @@ dm_atomic_plane_get_property(struct drm_plane *plane, 
		*val = dm_plane_state->degamma_tf;

	} else if (property == adev->mode_info.plane_hdr_mult_property) {

		*val = dm_plane_state->hdr_mult;

	} else if (property == adev->mode_info.plane_ctm_property) {

		*val = (dm_plane_state->ctm) ?

			dm_plane_state->ctm->base.id : 0;

	} else 	if (property == adev->mode_info.plane_shaper_lut_property) {

		*val = (dm_plane_state->shaper_lut) ?

			dm_plane_state->shaper_lut->base.id : 0;