Commit b8bdfc66 authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Stephen Boyd
Browse files

clk: en7523: move clock_register in hw_init callback 



Move en7523_register_clocks routine in hw_init callback.
Introduce en7523_clk_hw_init callback for EN7523 SoC.
This is a preliminary patch to differentiate IO mapped region between
EN7523 and EN7581 SoCs in order to access chip-scu IO region
<0x1fa20000 0x384> on EN7581 SoC as syscon device since it contains
miscellaneous registers needed by multiple devices (clock, pinctrl ..).

Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20241112-clk-en7581-syscon-v2-3-8ada5e394ae4@kernel.org


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent c31d1cdd

drivers/clk/clk-en7523.c

+50 −32
Original line number Diff line number Diff line
@@ -78,7 +78,8 @@ struct en_clk_soc_data { 
		const u16 *idx_map;

		u16 idx_map_nr;

	} reset;

	int (*hw_init)(struct platform_device *pdev, void __iomem *np_base);

	int (*hw_init)(struct platform_device *pdev,

		       struct clk_hw_onecell_data *clk_data);

};



static const u32 gsw_base[] = { 400000000, 500000000 };
@@ -406,20 +407,6 @@ static void en7581_pci_disable(struct clk_hw *hw) 
	usleep_range(1000, 2000);

}



static int en7581_clk_hw_init(struct platform_device *pdev,

			      void __iomem *np_base)

{

	u32 val;



	val = readl(np_base + REG_NP_SCU_SSTR);

	val &= ~(REG_PCIE_XSI0_SEL_MASK | REG_PCIE_XSI1_SEL_MASK);

	writel(val, np_base + REG_NP_SCU_SSTR);

	val = readl(np_base + REG_NP_SCU_PCIC);

	writel(val | 3, np_base + REG_NP_SCU_PCIC);



	return 0;

}



static void en7523_register_clocks(struct device *dev, struct clk_hw_onecell_data *clk_data,

				   void __iomem *base, void __iomem *np_base)

{
@@ -449,6 +436,49 @@ static void en7523_register_clocks(struct device *dev, struct clk_hw_onecell_dat 
	clk_data->num = EN7523_NUM_CLOCKS;

}



static int en7523_clk_hw_init(struct platform_device *pdev,

			      struct clk_hw_onecell_data *clk_data)

{

	void __iomem *base, *np_base;



	base = devm_platform_ioremap_resource(pdev, 0);

	if (IS_ERR(base))

		return PTR_ERR(base);



	np_base = devm_platform_ioremap_resource(pdev, 1);

	if (IS_ERR(np_base))

		return PTR_ERR(np_base);



	en7523_register_clocks(&pdev->dev, clk_data, base, np_base);



	return 0;

}



static int en7581_clk_hw_init(struct platform_device *pdev,

			      struct clk_hw_onecell_data *clk_data)

{

	void __iomem *base, *np_base;

	u32 val;



	base = devm_platform_ioremap_resource(pdev, 0);

	if (IS_ERR(base))

		return PTR_ERR(base);



	np_base = devm_platform_ioremap_resource(pdev, 1);

	if (IS_ERR(np_base))

		return PTR_ERR(np_base);



	en7523_register_clocks(&pdev->dev, clk_data, base, np_base);



	val = readl(np_base + REG_NP_SCU_SSTR);

	val &= ~(REG_PCIE_XSI0_SEL_MASK | REG_PCIE_XSI1_SEL_MASK);

	writel(val, np_base + REG_NP_SCU_SSTR);

	val = readl(np_base + REG_NP_SCU_PCIC);

	writel(val | 3, np_base + REG_NP_SCU_PCIC);



	return 0;

}



static int en7523_reset_update(struct reset_controller_dev *rcdev,

			       unsigned long id, bool assert)

{
@@ -543,31 +573,18 @@ static int en7523_clk_probe(struct platform_device *pdev) 
	struct device_node *node = pdev->dev.of_node;

	const struct en_clk_soc_data *soc_data;

	struct clk_hw_onecell_data *clk_data;

	void __iomem *base, *np_base;

	int r;



	base = devm_platform_ioremap_resource(pdev, 0);

	if (IS_ERR(base))

		return PTR_ERR(base);



	np_base = devm_platform_ioremap_resource(pdev, 1);

	if (IS_ERR(np_base))

		return PTR_ERR(np_base);



	soc_data = device_get_match_data(&pdev->dev);

	if (soc_data->hw_init) {

		r = soc_data->hw_init(pdev, np_base);

		if (r)

			return r;

	}



	clk_data = devm_kzalloc(&pdev->dev,

				struct_size(clk_data, hws, EN7523_NUM_CLOCKS),

				GFP_KERNEL);

	if (!clk_data)

		return -ENOMEM;



	en7523_register_clocks(&pdev->dev, clk_data, base, np_base);

	soc_data = device_get_match_data(&pdev->dev);

	r = soc_data->hw_init(pdev, clk_data);

	if (r)

		return r;



	r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

	if (r)
@@ -590,6 +607,7 @@ static const struct en_clk_soc_data en7523_data = { 
		.prepare = en7523_pci_prepare,

		.unprepare = en7523_pci_unprepare,

	},

	.hw_init = en7523_clk_hw_init,

};



static const struct en_clk_soc_data en7581_data = {