Commit b9aedd32 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: extract bandwidth aggregation function 



In preparation to refactoring the dpu_core_perf debugfs interface,
extract the bandwidth aggregation function from
_dpu_core_perf_crtc_update_bus().

Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/636058/
Link: https://lore.kernel.org/r/20250209-dpu-perf-rework-v5-1-87e936cf3004@linaro.org
parent 989a2421

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

+25 −20
Original line number Diff line number Diff line
@@ -210,36 +210,41 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc, 
	return 0;

}



static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,

		struct drm_crtc *crtc)

static void dpu_core_perf_aggregate(struct drm_device *ddev,

				    enum dpu_crtc_client_type curr_client_type,

				    struct dpu_core_perf_params *perf)

{

	struct dpu_core_perf_params perf = { 0 };

	enum dpu_crtc_client_type curr_client_type

					= dpu_crtc_get_client_type(crtc);

	struct drm_crtc *tmp_crtc;

	struct dpu_crtc_state *dpu_cstate;

	int i, ret = 0;

	u64 avg_bw;



	if (!kms->num_paths)

		return 0;

	struct drm_crtc *tmp_crtc;



	drm_for_each_crtc(tmp_crtc, crtc->dev) {

	drm_for_each_crtc(tmp_crtc, ddev) {

		if (tmp_crtc->enabled &&

			curr_client_type ==

				dpu_crtc_get_client_type(tmp_crtc)) {

		    curr_client_type == dpu_crtc_get_client_type(tmp_crtc)) {

			dpu_cstate = to_dpu_crtc_state(tmp_crtc->state);



			perf.max_per_pipe_ib = max(perf.max_per_pipe_ib,

			perf->max_per_pipe_ib = max(perf->max_per_pipe_ib,

						    dpu_cstate->new_perf.max_per_pipe_ib);



			perf.bw_ctl += dpu_cstate->new_perf.bw_ctl;

			perf->bw_ctl += dpu_cstate->new_perf.bw_ctl;



			DRM_DEBUG_ATOMIC("crtc=%d bw=%llu paths:%d\n",

			DRM_DEBUG_ATOMIC("crtc=%d bw=%llu\n",

					 tmp_crtc->base.id,

				  dpu_cstate->new_perf.bw_ctl, kms->num_paths);

					 dpu_cstate->new_perf.bw_ctl);

		}

	}

}



static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,

					  struct drm_crtc *crtc)

{

	struct dpu_core_perf_params perf = { 0 };

	int i, ret = 0;

	u64 avg_bw;



	if (!kms->num_paths)

		return 0;



	dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf);



	avg_bw = perf.bw_ctl;

	do_div(avg_bw, (kms->num_paths * 1000)); /*Bps_to_icc*/