Commit b9c58f4e authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: Generalize is_multi_chiplet with a common helper v2 



It is not necessary to be ip generation specific

v2: rename the helper to is_multi_aid (Lijo)

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c9df2dcf

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+5 −0
Original line number Diff line number Diff line
@@ -1334,6 +1334,11 @@ static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_device *bdev) 
	return container_of(bdev, struct amdgpu_device, mman.bdev);

}



static inline bool amdgpu_is_multi_aid(struct amdgpu_device *adev)

{

	return !!adev->aid_mask;

}



int amdgpu_device_init(struct amdgpu_device *adev,

		       uint32_t flags);

void amdgpu_device_fini_hw(struct amdgpu_device *adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+9 −14
Original line number Diff line number Diff line
@@ -409,11 +409,6 @@ static const uint32_t ecc_umc_mcumc_ctrl_mask_addrs[] = { 
	(0x001d43e0 + 0x00001800),

};



static inline bool gmc_v9_0_is_multi_chiplet(struct amdgpu_device *adev)

{

	return !!adev->aid_mask;

}



static int gmc_v9_0_ecc_interrupt_state(struct amdgpu_device *adev,

		struct amdgpu_irq_src *src,

		unsigned int type,
@@ -650,7 +645,7 @@ static int gmc_v9_0_process_interrupt(struct amdgpu_device *adev, 
		addr, entry->client_id,

		soc15_ih_clientid_name[entry->client_id]);



	if (gmc_v9_0_is_multi_chiplet(adev))

	if (amdgpu_is_multi_aid(adev))

		dev_err(adev->dev, "  cookie node_id %d fault from die %s%d%s\n",

			node_id, node_id % 4 == 3 ? "RSV" : "AID", node_id / 4,

			node_id % 4 == 1 ? ".XCD0" : node_id % 4 == 2 ? ".XCD1" : "");
@@ -799,7 +794,7 @@ static bool gmc_v9_0_use_invalidate_semaphore(struct amdgpu_device *adev, 
				       uint32_t vmhub)

{

	if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2) ||

	    gmc_v9_0_is_multi_chiplet(adev))

	    amdgpu_is_multi_aid(adev))

		return false;



	return ((vmhub == AMDGPU_MMHUB0(0) ||
@@ -1511,7 +1506,7 @@ static void gmc_v9_0_set_mmhub_ras_funcs(struct amdgpu_device *adev) 


static void gmc_v9_0_set_gfxhub_funcs(struct amdgpu_device *adev)

{

	if (gmc_v9_0_is_multi_chiplet(adev))

	if (amdgpu_is_multi_aid(adev))

		adev->gfxhub.funcs = &gfxhub_v1_2_funcs;

	else

		adev->gfxhub.funcs = &gfxhub_v1_0_funcs;
@@ -1593,7 +1588,7 @@ static int gmc_v9_0_early_init(struct amdgpu_ip_block *ip_block) 
	 */

	if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 0) ||

	    amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 1) ||

	    gmc_v9_0_is_multi_chiplet(adev))

	    amdgpu_is_multi_aid(adev))

		adev->gmc.xgmi.supported = true;



	if (amdgpu_ip_version(adev, XGMI_HWIP, 0) == IP_VERSION(6, 1, 0)) {
@@ -2046,7 +2041,7 @@ static int gmc_v9_0_sw_init(struct amdgpu_ip_block *ip_block) 


	spin_lock_init(&adev->gmc.invalidate_lock);



	if (gmc_v9_0_is_multi_chiplet(adev)) {

	if (amdgpu_is_multi_aid(adev)) {

		gmc_v9_4_3_init_vram_info(adev);

	} else if (!adev->bios) {

		if (adev->flags & AMD_IS_APU) {
@@ -2196,7 +2191,7 @@ static int gmc_v9_0_sw_init(struct amdgpu_ip_block *ip_block) 


	amdgpu_gmc_get_vbios_allocations(adev);



	if (gmc_v9_0_is_multi_chiplet(adev)) {

	if (amdgpu_is_multi_aid(adev)) {

		r = gmc_v9_0_init_mem_ranges(adev);

		if (r)

			return r;
@@ -2225,7 +2220,7 @@ static int gmc_v9_0_sw_init(struct amdgpu_ip_block *ip_block) 
	adev->vm_manager.first_kfd_vmid =

		(amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 1) ||

		 amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2) ||

		 gmc_v9_0_is_multi_chiplet(adev)) ?

		 amdgpu_is_multi_aid(adev)) ?

			3 :

			8;
@@ -2237,7 +2232,7 @@ static int gmc_v9_0_sw_init(struct amdgpu_ip_block *ip_block) 
	if (r)

		return r;



	if (gmc_v9_0_is_multi_chiplet(adev))

	if (amdgpu_is_multi_aid(adev))

		amdgpu_gmc_sysfs_init(adev);



	return 0;
@@ -2247,7 +2242,7 @@ static int gmc_v9_0_sw_fini(struct amdgpu_ip_block *ip_block) 
{

	struct amdgpu_device *adev = ip_block->adev;



	if (gmc_v9_0_is_multi_chiplet(adev))

	if (amdgpu_is_multi_aid(adev))

		amdgpu_gmc_sysfs_fini(adev);



	amdgpu_gmc_ras_fini(adev);