Commit ba581156 authored Dec 04, 2024 by Fei Shao Committed by Chun-Kuang Hu Jan 02, 2025

drm/mediatek: dp: Support flexible length of DP calibration data

The DP calibration data is stored in nvmem cells, and the data layout is
described in the `mtk_dp_efuse_fmt` arrays for each platform.

There is no guarantee that the data is always a 4-length u32 cell array.
For example, MT8188 has a data length of 3, preventing it from passing
the preliminary check and undergoing calibration.

Update the logic to support flexible data lengths. Specifically, we
validate the length returned from `nvmem_cell_read()` against the
platform-specific efuse format. If out-of-bound access is detected, fall
back to the default calibration values. This likely indicates an error
in either the efuse data length described in DT or the efuse format
within the driver.

Signed-off-by: Fei Shao <fshao@chromium.org>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20241204142626.158395-1-fshao@chromium.org/

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

parent 4f0d4a82

drivers/gpu/drm/mediatek/mtk_dp.c

+13 −5

Original line number	Diff line number	Diff line
		@@ -1177,17 +1177,25 @@ static void mtk_dp_get_calibration_data(struct mtk_dp *mtk_dp)
		buf = (u32 *)nvmem_cell_read(cell, &len);
		nvmem_cell_put(cell);

		if (IS_ERR(buf) \|\| ((len / sizeof(u32)) != 4)) {
		if (IS_ERR(buf)) {
		dev_warn(dev, "Failed to read nvmem_cell_read\n");

		if (!IS_ERR(buf))
		kfree(buf);

		goto use_default_val;
		}

		/* The cell length is in bytes. Convert it to be compatible with u32 buffer. */
		len /= sizeof(u32);

		for (i = 0; i < MTK_DP_CAL_MAX; i++) {
		fmt = &mtk_dp->data->efuse_fmt[i];

		if (fmt->idx >= len) {
		dev_warn(mtk_dp->dev,
		"Out-of-bound efuse data access, fmt idx = %d, buf len = %zu\n",
		fmt->idx, len);
		kfree(buf);
		goto use_default_val;
		}

		cal_data[i] = (buf[fmt->idx] >> fmt->shift) & fmt->mask;

		if (cal_data[i] < fmt->min_val \|\| cal_data[i] > fmt->max_val) {