Commit bb90401b authored by Suraj Kandpal's avatar Suraj Kandpal
Browse files

drm/i915/dpll: Rename intel_<release/reserve>_dpll 



Rename intel_<release/reserve>_dpll to
intel_dpll_<release/reserve> in an effort to keep names of
exported functions start with the filename.

Signed-off-by: default avatarSuraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://lore.kernel.org/r/20250515071801.2221120-13-suraj.kandpal@intel.com
parent c51686d8

drivers/gpu/drm/i915/display/intel_display.c

+1 −1
Original line number Diff line number Diff line
@@ -6436,7 +6436,7 @@ int intel_atomic_check(struct drm_device *dev, 


		any_ms = true;



		intel_release_dplls(state, crtc);

		intel_dpll_release(state, crtc);

	}



	if (any_ms && !check_digital_port_conflicts(state)) {

drivers/gpu/drm/i915/display/intel_dpll.c

+2 −2
Original line number Diff line number Diff line
@@ -1190,7 +1190,7 @@ static int hsw_crtc_get_dpll(struct intel_atomic_state *state, 
	    intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))

		return 0;



	return intel_reserve_dplls(state, crtc, encoder);

	return intel_dpll_reserve(state, crtc, encoder);

}



static int dg2_crtc_compute_clock(struct intel_atomic_state *state,
@@ -1415,7 +1415,7 @@ static int ilk_crtc_get_dpll(struct intel_atomic_state *state, 
	if (!crtc_state->has_pch_encoder)

		return 0;



	return intel_reserve_dplls(state, crtc, NULL);

	return intel_dpll_reserve(state, crtc, NULL);

}



static u32 vlv_dpll(const struct intel_crtc_state *crtc_state)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

+13 −13
Original line number Diff line number Diff line
@@ -56,8 +56,8 @@ 
 * users of a PLL are tracked and that tracking is integrated with the atomic

 * modset interface. During an atomic operation, required PLLs can be reserved

 * for a given CRTC and encoder configuration by calling

 * intel_reserve_dplls() and previously reserved PLLs can be released

 * with intel_release_dplls().

 * intel_dpll_reserve() and previously reserved PLLs can be released

 * with intel_dpll_release().

 * Changes to the users are first staged in the atomic state, and then made

 * effective by calling intel_dpll_swap_state() during the atomic

 * commit phase.
@@ -4388,7 +4388,7 @@ int intel_compute_dplls(struct intel_atomic_state *state, 
}



/**

 * intel_reserve_dplls - reserve DPLLs for CRTC and encoder combination

 * intel_dpll_reserve - reserve DPLLs for CRTC and encoder combination

 * @state: atomic state

 * @crtc: CRTC to reserve DPLLs for

 * @encoder: encoder
@@ -4401,13 +4401,13 @@ int intel_compute_dplls(struct intel_atomic_state *state, 
 * calling intel_dpll_swap_state().

 *

 * The reserved DPLLs should be released by calling

 * intel_release_dplls().

 * intel_dpll_release().

 *

 * Returns:

 * 0 if all required DPLLs were successfully reserved,

 * negative error code otherwise.

 */

int intel_reserve_dplls(struct intel_atomic_state *state,

int intel_dpll_reserve(struct intel_atomic_state *state,

		       struct intel_crtc *crtc,

		       struct intel_encoder *encoder)

{
@@ -4421,17 +4421,17 @@ int intel_reserve_dplls(struct intel_atomic_state *state, 
}



/**

 * intel_release_dplls - end use of DPLLs by CRTC in atomic state

 * intel_dpll_release - end use of DPLLs by CRTC in atomic state

 * @state: atomic state

 * @crtc: crtc from which the DPLLs are to be released

 *

 * This function releases all DPLLs reserved by intel_reserve_dplls()

 * This function releases all DPLLs reserved by intel_dpll_reserve()

 * from the current atomic commit @state and the old @crtc atomic state.

 *

 * The new configuration in the atomic commit @state is made effective by

 * calling intel_dpll_swap_state().

 */

void intel_release_dplls(struct intel_atomic_state *state,

void intel_dpll_release(struct intel_atomic_state *state,

			struct intel_crtc *crtc)

{

	struct intel_display *display = to_intel_display(state);
@@ -4440,7 +4440,7 @@ void intel_release_dplls(struct intel_atomic_state *state, 
	/*

	 * FIXME: this function is called for every platform having a

	 * compute_clock hook, even though the platform doesn't yet support

	 * the DPLL framework and intel_reserve_dplls() is not

	 * the DPLL framework and intel_dpll_reserve() is not

	 * called on those.

	 */

	if (!dpll_mgr)
@@ -4456,7 +4456,7 @@ void intel_release_dplls(struct intel_atomic_state *state, 
 * @encoder: encoder determining the type of port DPLL

 *

 * Update the active DPLL for the given @crtc/@encoder in @crtc's atomic state,

 * from the port DPLLs reserved previously by intel_reserve_dplls(). The

 * from the port DPLLs reserved previously by intel_dpll_reserve(). The

 * DPLL selected will be based on the current mode of the encoder's port.

 */

void intel_update_active_dpll(struct intel_atomic_state *state,

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

+5 −5
Original line number Diff line number Diff line
@@ -399,10 +399,10 @@ void assert_dpll(struct intel_display *display, 
int intel_compute_dplls(struct intel_atomic_state *state,

			struct intel_crtc *crtc,

			struct intel_encoder *encoder);

int intel_reserve_dplls(struct intel_atomic_state *state,

int intel_dpll_reserve(struct intel_atomic_state *state,

		       struct intel_crtc *crtc,

		       struct intel_encoder *encoder);

void intel_release_dplls(struct intel_atomic_state *state,

void intel_dpll_release(struct intel_atomic_state *state,

			struct intel_crtc *crtc);

void intel_dpll_crtc_put(const struct intel_crtc *crtc,

			 const struct intel_dpll *pll,