Commit bd35cbd7 authored by Georgi Djakov's avatar Georgi Djakov
Browse files

Merge branch 'icc-sdx75' into icc-next 

Add interconnect driver support for SDX75 platform.

* icc-sdx75
  dt-bindings: interconnect: Add compatibles for SDX75
  interconnect: qcom: Add SDX75 interconnect provider driver

 Link: https://lore.kernel.org/r/1694614256-24109-1-git-send-email-quic_rohiagar@quicinc.com
 Signed-off-by: Georgi Djakov <djakov@kernel.org>anter a commit message to explain why this merge is necessary,
parents 9ee52141 3642b4e5

Documentation/devicetree/bindings/interconnect/qcom,sdx75-rpmh.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interconnect/qcom,sdx75-rpmh.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm RPMh Network-On-Chip Interconnect on SDX75



maintainers:

  - Rohit Agarwal <quic_rohiagar@quicinc.com>



description:

  RPMh interconnect providers support system bandwidth requirements through

  RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is

  able to communicate with the BCM through the Resource State Coordinator (RSC)

  associated with each execution environment. Provider nodes must point to at

  least one RPMh device child node pertaining to their RSC and each provider

  can map to multiple RPMh resources.



properties:

  compatible:

    enum:

      - qcom,sdx75-clk-virt

      - qcom,sdx75-dc-noc

      - qcom,sdx75-gem-noc

      - qcom,sdx75-mc-virt

      - qcom,sdx75-pcie-anoc

      - qcom,sdx75-system-noc



  '#interconnect-cells': true



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



required:

  - compatible



allOf:

  - $ref: qcom,rpmh-common.yaml#

  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,sdx75-clk-virt

              - qcom,sdx75-mc-virt

    then:

      properties:

        reg: false

    else:

      required:

        - reg



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,sdx75-clk-virt

    then:

      properties:

        clocks:

          items:

            - description: RPMH CC QPIC Clock

      required:

        - clocks

    else:

      properties:

        clocks: false



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/qcom,rpmh.h>



    clk_virt: interconnect-0 {

            compatible = "qcom,sdx75-clk-virt";

            #interconnect-cells = <2>;

            qcom,bcm-voters = <&apps_bcm_voter>;

            clocks = <&rpmhcc RPMH_QPIC_CLK>;

    };



    system_noc: interconnect@1640000 {

            compatible = "qcom,sdx75-system-noc";

            reg = <0x1640000 0x4b400>;

            #interconnect-cells = <2>;

            qcom,bcm-voters = <&apps_bcm_voter>;

    };

drivers/interconnect/qcom/Kconfig

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@@ -182,6 +182,15 @@ config INTERCONNECT_QCOM_SDX65 
	  This is a driver for the Qualcomm Network-on-Chip on sdx65-based

	  platforms.



config INTERCONNECT_QCOM_SDX75

	tristate "Qualcomm SDX75 interconnect driver"

	depends on INTERCONNECT_QCOM_RPMH_POSSIBLE

	select INTERCONNECT_QCOM_RPMH

	select INTERCONNECT_QCOM_BCM_VOTER

	help

	  This is a driver for the Qualcomm Network-on-Chip on sdx75-based

	  platforms.



config INTERCONNECT_QCOM_SM6350

	tristate "Qualcomm SM6350 interconnect driver"

	depends on INTERCONNECT_QCOM_RPMH_POSSIBLE

drivers/interconnect/qcom/Makefile

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@@ -23,6 +23,7 @@ qnoc-sdm670-objs := sdm670.o 
qnoc-sdm845-objs			:= sdm845.o

qnoc-sdx55-objs				:= sdx55.o

qnoc-sdx65-objs				:= sdx65.o

qnoc-sdx75-objs				:= sdx75.o

qnoc-sm6350-objs			:= sm6350.o

qnoc-sm8150-objs			:= sm8150.o

qnoc-sm8250-objs			:= sm8250.o
@@ -51,6 +52,7 @@ obj-$(CONFIG_INTERCONNECT_QCOM_SDM670) += qnoc-sdm670.o 
obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o

obj-$(CONFIG_INTERCONNECT_QCOM_SDX55) += qnoc-sdx55.o

obj-$(CONFIG_INTERCONNECT_QCOM_SDX65) += qnoc-sdx65.o

obj-$(CONFIG_INTERCONNECT_QCOM_SDX75) += qnoc-sdx75.o

obj-$(CONFIG_INTERCONNECT_QCOM_SM6350) += qnoc-sm6350.o

obj-$(CONFIG_INTERCONNECT_QCOM_SM8150) += qnoc-sm8150.o

obj-$(CONFIG_INTERCONNECT_QCOM_SM8250) += qnoc-sm8250.o

drivers/interconnect/qcom/sdx75.c

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drivers/interconnect/qcom/sdx75.h

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/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.

 */



#ifndef __DRIVERS_INTERCONNECT_QCOM_SDX75_H

#define __DRIVERS_INTERCONNECT_QCOM_SDX75_H



#define SDX75_MASTER_ANOC_PCIE_GEM_NOC		0

#define SDX75_MASTER_ANOC_SNOC			1

#define SDX75_MASTER_APPSS_PROC			2

#define SDX75_MASTER_AUDIO			3

#define SDX75_MASTER_CNOC_DC_NOC		4

#define SDX75_MASTER_CRYPTO			5

#define SDX75_MASTER_EMAC_0			6

#define SDX75_MASTER_EMAC_1			7

#define SDX75_MASTER_GEM_NOC_CFG		8

#define SDX75_MASTER_GEM_NOC_CNOC		9

#define SDX75_MASTER_GEM_NOC_PCIE_SNOC		10

#define SDX75_MASTER_GIC			11

#define SDX75_MASTER_GIC_AHB			12

#define SDX75_MASTER_IPA			13

#define SDX75_MASTER_IPA_PCIE			14

#define SDX75_MASTER_LLCC			15

#define SDX75_MASTER_MSS_PROC			16

#define SDX75_MASTER_MVMSS			17

#define SDX75_MASTER_PCIE_0			18

#define SDX75_MASTER_PCIE_1			19

#define SDX75_MASTER_PCIE_2			20

#define SDX75_MASTER_PCIE_ANOC_CFG		21

#define SDX75_MASTER_PCIE_RSCC			22

#define SDX75_MASTER_QDSS_BAM			23

#define SDX75_MASTER_QDSS_ETR			24

#define SDX75_MASTER_QDSS_ETR_1			25

#define SDX75_MASTER_QPIC			26

#define SDX75_MASTER_QPIC_CORE			27

#define SDX75_MASTER_QUP_0			28

#define SDX75_MASTER_QUP_CORE_0			29

#define SDX75_MASTER_SDCC_1			30

#define SDX75_MASTER_SDCC_4			31

#define SDX75_MASTER_SNOC_CFG			32

#define SDX75_MASTER_SNOC_SF_MEM_NOC		33

#define SDX75_MASTER_SYS_TCU			34

#define SDX75_MASTER_USB3_0			35

#define SDX75_SLAVE_A1NOC_CFG			36

#define SDX75_SLAVE_ANOC_PCIE_GEM_NOC		37

#define SDX75_SLAVE_AUDIO			38

#define SDX75_SLAVE_CLK_CTL			39

#define SDX75_SLAVE_CRYPTO_0_CFG		40

#define SDX75_SLAVE_CNOC_MSS			41

#define SDX75_SLAVE_DDRSS_CFG			42

#define SDX75_SLAVE_EBI1			43

#define SDX75_SLAVE_ETH0_CFG			44

#define SDX75_SLAVE_ETH1_CFG			45

#define SDX75_SLAVE_GEM_NOC_CFG			46

#define SDX75_SLAVE_GEM_NOC_CNOC		47

#define SDX75_SLAVE_ICBDI_MVMSS_CFG		48

#define SDX75_SLAVE_IMEM			49

#define SDX75_SLAVE_IMEM_CFG			50

#define SDX75_SLAVE_IPA_CFG			51

#define SDX75_SLAVE_IPC_ROUTER_CFG		52

#define SDX75_SLAVE_LAGG_CFG			53

#define SDX75_SLAVE_LLCC			54

#define SDX75_SLAVE_MCCC_MASTER			55

#define SDX75_SLAVE_MEM_NOC_PCIE_SNOC		56

#define SDX75_SLAVE_PCIE_0			57

#define SDX75_SLAVE_PCIE_1			58

#define SDX75_SLAVE_PCIE_2			59

#define SDX75_SLAVE_PCIE_0_CFG			60

#define SDX75_SLAVE_PCIE_1_CFG			61

#define SDX75_SLAVE_PCIE_2_CFG			62

#define SDX75_SLAVE_PCIE_ANOC_CFG		63

#define SDX75_SLAVE_PCIE_RSC_CFG		64

#define SDX75_SLAVE_PDM				65

#define SDX75_SLAVE_PRNG			66

#define SDX75_SLAVE_QDSS_CFG			67

#define SDX75_SLAVE_QDSS_STM			68

#define SDX75_SLAVE_QPIC			69

#define SDX75_SLAVE_QPIC_CORE			70

#define SDX75_SLAVE_QUP_0			71

#define SDX75_SLAVE_QUP_CORE_0			72

#define SDX75_SLAVE_SDCC_1			73

#define SDX75_SLAVE_SDCC_4			74

#define SDX75_SLAVE_SERVICE_GEM_NOC		75

#define SDX75_SLAVE_SERVICE_PCIE_ANOC		76

#define SDX75_SLAVE_SERVICE_SNOC		77

#define SDX75_SLAVE_SNOC_CFG			78

#define SDX75_SLAVE_SNOC_GEM_NOC_SF		79

#define SDX75_SLAVE_SNOOP_BWMON			80

#define SDX75_SLAVE_SPMI_VGI_COEX		81

#define SDX75_SLAVE_TCSR			82

#define SDX75_SLAVE_TCU				83

#define SDX75_SLAVE_TLMM			84

#define SDX75_SLAVE_USB3			85

#define SDX75_SLAVE_USB3_PHY_CFG		86



#endif