Commit bdc319f1 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'coresight-next-v6.16' of... 

Merge tag 'coresight-next-v6.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux

 into char-misc-next

Suzuki writes:

coresight: updates for Linux v6.16

CoreSight self-hosted trace driver subsystem updates for Linux v6.16 includes:
 - Clear CLAIM tags on device probe if self-hosted tags are set.
 - Support for perf AUX pause/resume for CoreSight ETM PMU driver, with trace
   collection at pause.
 - Miscellaneous fixes for the subsystem

Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>

* tag 'coresight-next-v6.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux: (27 commits)
  coresight: prevent deactivate active config while enabling the config
  coresight: holding cscfg_csdev_lock while removing cscfg from csdev
  coresight/etm4: fix missing disable active config
  coresight: etm4x: Fix timestamp bit field handling
  coresight: tmc: fix failure to disable/enable ETF after reading
  Documentation: coresight: Document AUX pause and resume
  coresight: perf: Update buffer on AUX pause
  coresight: tmc: Re-enable sink after buffer update
  coresight: perf: Support AUX trace pause and resume
  coresight: etm4x: Hook pause and resume callbacks
  coresight: Introduce pause and resume APIs for source
  coresight: etm4x: Extract the trace unit controlling
  coresight: cti: Replace inclusion by struct fwnode_handle forward declaration
  coresight: Disable MMIO logging for coresight stm driver
  coresight: replicator: Fix panic for clearing claim tag
  coresight: Add a KUnit test for coresight_find_default_sink()
  coresight: Remove extern from function declarations
  coresight: Remove inlines from static function definitions
  coresight: Clear self hosted claim tag on probe
  coresight: etm3x: Convert raw base pointer to struct coresight access
  ...
parents 0ca7cb70 408c97c4

Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml

+13 −0
Original line number Diff line number Diff line
@@ -30,6 +30,19 @@ properties: 
  power-domains:

    maxItems: 1



  clocks:

    minItems: 1

    maxItems: 3



  clock-names:

    oneOf:

      - items:

          - enum: [apb_pclk, atclk]

      - items: # Zynq-700

          - const: apb_pclk

          - const: dbg_trc

          - const: dbg_apb



  in-ports:

    $ref: /schemas/graph.yaml#/properties/ports

    additionalProperties: false

Documentation/trace/coresight/coresight-perf.rst

+31 −0
Original line number Diff line number Diff line
@@ -78,6 +78,37 @@ enabled like:: 


Please refer to the kernel configuration help for more information.



Fine-grained tracing with AUX pause and resume

----------------------------------------------



Arm CoreSight may generate a large amount of hardware trace data, which

will lead to overhead in recording and distract users when reviewing

profiling result. To mitigate the issue of excessive trace data, Perf

provides AUX pause and resume functionality for fine-grained tracing.



The AUX pause and resume can be triggered by associated events. These

events can be ftrace tracepoints (including static and dynamic

tracepoints) or PMU events (e.g. CPU PMU cycle event). To create a perf

session with AUX pause / resume, three configuration terms are

introduced:



- "aux-action=start-paused": it is specified for the cs_etm PMU event to

  launch in a paused state.

- "aux-action=pause": an associated event is specified with this term

  to pause AUX trace.

- "aux-action=resume": an associated event is specified with this term

  to resume AUX trace.



Example for triggering AUX pause and resume with ftrace tracepoints::



  perf record -e cs_etm/aux-action=start-paused/k,syscalls:sys_enter_openat/aux-action=resume/,syscalls:sys_exit_openat/aux-action=pause/ ls



Example for triggering AUX pause and resume with PMU event::



  perf record -a -e cs_etm/aux-action=start-paused/k \

        -e cycles/aux-action=pause,period=10000000/ \

        -e cycles/aux-action=resume,period=1050000/ -- sleep 1



Perf test - Verify kernel and userspace perf CoreSight work

-----------------------------------------------------------

drivers/hwtracing/coresight/Kconfig

+9 −0
Original line number Diff line number Diff line
@@ -259,4 +259,13 @@ config CORESIGHT_DUMMY 


	  To compile this driver as a module, choose M here: the module will be

	  called coresight-dummy.



config CORESIGHT_KUNIT_TESTS

	  tristate "Enable Coresight unit tests"

	  depends on KUNIT

	  default KUNIT_ALL_TESTS

	  help

	    Enable Coresight unit tests. Only useful for development and not

	    intended for production.



endif

drivers/hwtracing/coresight/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -22,6 +22,8 @@ condflags := \ 
	$(call cc-option, -Wstringop-truncation)

subdir-ccflags-y += $(condflags)



CFLAGS_coresight-stm.o := -D__DISABLE_TRACE_MMIO__



obj-$(CONFIG_CORESIGHT) += coresight.o

coresight-y := coresight-core.o  coresight-etm-perf.o coresight-platform.o \

		coresight-sysfs.o coresight-syscfg.o coresight-config.o \
@@ -53,3 +55,4 @@ obj-$(CONFIG_ULTRASOC_SMB) += ultrasoc-smb.o 
obj-$(CONFIG_CORESIGHT_DUMMY) += coresight-dummy.o

obj-$(CONFIG_CORESIGHT_CTCU) += coresight-ctcu.o

coresight-ctcu-y := coresight-ctcu-core.o

obj-$(CONFIG_CORESIGHT_KUNIT_TESTS) += coresight-kunit-tests.o

drivers/hwtracing/coresight/coresight-catu.c

+24 −15
Original line number Diff line number Diff line
@@ -113,8 +113,7 @@ typedef u64 cate_t; 
 * containing the data page pointer for @offset. If @daddrp is not NULL,

 * @daddrp points the DMA address of the beginning of the table.

 */

static inline cate_t *catu_get_table(struct tmc_sg_table *catu_table,

				     unsigned long offset,

static cate_t *catu_get_table(struct tmc_sg_table *catu_table, unsigned long offset,

			      dma_addr_t *daddrp)

{

	unsigned long buf_size = tmc_sg_table_buf_size(catu_table);
@@ -165,12 +164,12 @@ static void catu_dump_table(struct tmc_sg_table *catu_table) 
}



#else

static inline void catu_dump_table(struct tmc_sg_table *catu_table)

static void catu_dump_table(struct tmc_sg_table *catu_table)

{

}

#endif



static inline cate_t catu_make_entry(dma_addr_t addr)

static cate_t catu_make_entry(dma_addr_t addr)

{

	return addr ? CATU_VALID_ENTRY(addr) : 0;

}
@@ -390,7 +389,7 @@ static const struct attribute_group *catu_groups[] = { 
};





static inline int catu_wait_for_ready(struct catu_drvdata *drvdata)

static int catu_wait_for_ready(struct catu_drvdata *drvdata)

{

	struct csdev_access *csa = &drvdata->csdev->access;
@@ -458,12 +457,17 @@ static int catu_enable_hw(struct catu_drvdata *drvdata, enum cs_mode cs_mode, 
static int catu_enable(struct coresight_device *csdev, enum cs_mode mode,

		       void *data)

{

	int rc;

	int rc = 0;

	struct catu_drvdata *catu_drvdata = csdev_to_catu_drvdata(csdev);



	guard(raw_spinlock_irqsave)(&catu_drvdata->spinlock);

	if (csdev->refcnt == 0) {

		CS_UNLOCK(catu_drvdata->base);

		rc = catu_enable_hw(catu_drvdata, mode, data);

		CS_LOCK(catu_drvdata->base);

	}

	if (!rc)

		csdev->refcnt++;

	return rc;

}
@@ -486,12 +490,15 @@ static int catu_disable_hw(struct catu_drvdata *drvdata) 


static int catu_disable(struct coresight_device *csdev, void *__unused)

{

	int rc;

	int rc = 0;

	struct catu_drvdata *catu_drvdata = csdev_to_catu_drvdata(csdev);



	guard(raw_spinlock_irqsave)(&catu_drvdata->spinlock);

	if (--csdev->refcnt == 0) {

		CS_UNLOCK(catu_drvdata->base);

		rc = catu_disable_hw(catu_drvdata);

		CS_LOCK(catu_drvdata->base);

	}

	return rc;

}
@@ -550,6 +557,7 @@ static int __catu_probe(struct device *dev, struct resource *res) 
	dev->platform_data = pdata;



	drvdata->base = base;

	raw_spin_lock_init(&drvdata->spinlock);

	catu_desc.access = CSDEV_ACCESS_IOMEM(base);

	catu_desc.pdata = pdata;

	catu_desc.dev = dev;
@@ -558,6 +566,7 @@ static int __catu_probe(struct device *dev, struct resource *res) 
	catu_desc.subtype.helper_subtype = CORESIGHT_DEV_SUBTYPE_HELPER_CATU;

	catu_desc.ops = &catu_ops;



	coresight_clear_self_claim_tag(&catu_desc.access);

	drvdata->csdev = coresight_register(&catu_desc);

	if (IS_ERR(drvdata->csdev))

		ret = PTR_ERR(drvdata->csdev);
@@ -702,7 +711,7 @@ static int __init catu_init(void) 
{

	int ret;



	ret = coresight_init_driver("catu", &catu_driver, &catu_platform_driver);

	ret = coresight_init_driver("catu", &catu_driver, &catu_platform_driver, THIS_MODULE);

	tmc_etr_set_catu_ops(&etr_catu_buf_ops);

	return ret;

}