Merge tag 'drm-xe-next-2024-12-11' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next (bdecb30d) · Commits · git / linux-nf

Documentation/gpu/xe/index.rst

+1 −0

Original line number	Diff line number	Diff line
		@@ -23,4 +23,5 @@ DG2, etc is provided to prototype the driver.
		xe_firmware
		xe_tile
		xe_debugging
		xe_devcoredump
		xe-drm-usage-stats.rst

Documentation/gpu/xe/xe_devcoredump.rst

0 → 100644

+14 −0

Original line number	Diff line number	Diff line
		.. SPDX-License-Identifier: (GPL-2.0+ OR MIT)

		==================
		Xe Device Coredump
		==================

		.. kernel-doc:: drivers/gpu/drm/xe/xe_devcoredump.c
		:doc: Xe device coredump

		Internal API
		============

		.. kernel-doc:: drivers/gpu/drm/xe/xe_devcoredump.c
		:internal:

drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h

+7 −0

Original line number	Diff line number	Diff line
		@@ -200,6 +200,13 @@
		#define XELPDP_SSC_ENABLE_PLLA REG_BIT(1)
		#define XELPDP_SSC_ENABLE_PLLB REG_BIT(0)

		#define TCSS_DISP_MAILBOX_IN_CMD _MMIO(0x161300)
		#define TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY REG_BIT(31)
		#define TCSS_DISP_MAILBOX_IN_CMD_CMD_MASK REG_GENMASK(7, 0)
		#define TCSS_DISP_MAILBOX_IN_CMD_DATA(val) REG_FIELD_PREP(TCSS_DISP_MAILBOX_IN_CMD_CMD_MASK, val)

		#define TCSS_DISP_MAILBOX_IN_DATA _MMIO(0x161304)

		/* C10 Vendor Registers */
		#define PHY_C10_VDR_PLL(idx) (0xC00 + (idx))
		#define C10_PLL0_FRACEN REG_BIT8(4)

drivers/gpu/drm/i915/display/intel_tc.c

+35 −4

Original line number	Diff line number	Diff line
		@@ -1013,21 +1013,52 @@ xelpdp_tc_phy_wait_for_tcss_power(struct intel_tc_port *tc, bool enabled)
		return true;
		}

		/*
		* Gfx driver WA 14020908590 for PTL tcss_rxdetect_clkswb_req/ack
		* handshake violation when pwwreq= 0->1 during TC7/10 entry
		*/
		static void xelpdp_tc_power_request_wa(struct intel_display *display, bool enable)
		{
		/* check if mailbox is running busy */
		if (intel_de_wait_for_clear(display, TCSS_DISP_MAILBOX_IN_CMD,
		TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY, 10)) {
		drm_dbg_kms(display->drm,
		"Timeout waiting for TCSS mailbox run/busy bit to clear\n");
		return;
		}

		intel_de_write(display, TCSS_DISP_MAILBOX_IN_DATA, enable ? 1 : 0);
		intel_de_write(display, TCSS_DISP_MAILBOX_IN_CMD,
		TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY \|
		TCSS_DISP_MAILBOX_IN_CMD_DATA(0x1));

		/* wait to clear mailbox running busy bit before continuing */
		if (intel_de_wait_for_clear(display, TCSS_DISP_MAILBOX_IN_CMD,
		TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY, 10)) {
		drm_dbg_kms(display->drm,
		"Timeout after writing data to mailbox. Mailbox run/busy bit did not clear\n");
		return;
		}
		}

		static void __xelpdp_tc_phy_enable_tcss_power(struct intel_tc_port *tc, bool enable)
		{
		struct drm_i915_private *i915 = tc_to_i915(tc);
		struct intel_display *display = to_intel_display(tc->dig_port);
		enum port port = tc->dig_port->base.port;
		i915_reg_t reg = XELPDP_PORT_BUF_CTL1(i915, port);
		i915_reg_t reg = XELPDP_PORT_BUF_CTL1(display, port);
		u32 val;

		assert_tc_cold_blocked(tc);

		val = intel_de_read(i915, reg);
		if (DISPLAY_VER(display) == 30)
		xelpdp_tc_power_request_wa(display, enable);

		val = intel_de_read(display, reg);
		if (enable)
		val \|= XELPDP_TCSS_POWER_REQUEST;
		else
		val &= ~XELPDP_TCSS_POWER_REQUEST;
		intel_de_write(i915, reg, val);
		intel_de_write(display, reg, val);
		}

		static bool xelpdp_tc_phy_enable_tcss_power(struct intel_tc_port *tc, bool enable)

drivers/gpu/drm/ttm/ttm_bo_vm.c

+32 −8

Original line number	Diff line number	Diff line
		@@ -405,13 +405,25 @@ static int ttm_bo_vm_access_kmap(struct ttm_buffer_object *bo,
		return len;
		}

		int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr,
		/**
		* ttm_bo_access - Helper to access a buffer object
		*
		* @bo: ttm buffer object
		* @offset: access offset into buffer object
		* @buf: pointer to caller memory to read into or write from
		* @len: length of access
		* @write: write access
		*
		* Utility function to access a buffer object. Useful when buffer object cannot
		* be easily mapped (non-contiguous, non-visible, etc...). Should not directly
		* be exported to user space via a peak / poke interface.
		*
		* Returns:
		* @len if successful, negative error code on failure.
		*/
		int ttm_bo_access(struct ttm_buffer_object *bo, unsigned long offset,
		void *buf, int len, int write)
		{
		struct ttm_buffer_object *bo = vma->vm_private_data;
		unsigned long offset = (addr) - vma->vm_start +
		((vma->vm_pgoff - drm_vma_node_start(&bo->base.vma_node))
		<< PAGE_SHIFT);
		int ret;

		if (len < 1 \|\| (offset + len) > bo->base.size)
		@@ -429,8 +441,8 @@ int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr,
		break;
		default:
		if (bo->bdev->funcs->access_memory)
		ret = bo->bdev->funcs->access_memory(
		bo, offset, buf, len, write);
		ret = bo->bdev->funcs->access_memory
		(bo, offset, buf, len, write);
		else
		ret = -EIO;
		}
		@@ -439,6 +451,18 @@ int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr,

		return ret;
		}
		EXPORT_SYMBOL(ttm_bo_access);

		int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr,
		void *buf, int len, int write)
		{
		struct ttm_buffer_object *bo = vma->vm_private_data;
		unsigned long offset = (addr) - vma->vm_start +
		((vma->vm_pgoff - drm_vma_node_start(&bo->base.vma_node))
		<< PAGE_SHIFT);

		return ttm_bo_access(bo, offset, buf, len, write);
		}
		EXPORT_SYMBOL(ttm_bo_vm_access);

		static const struct vm_operations_struct ttm_bo_vm_ops = {