Loading MAINTAINERS +1 −0 Original line number Diff line number Diff line Loading @@ -6213,6 +6213,7 @@ F: drivers/scsi/fnic/ CISCO SCSI HBA DRIVER M: Karan Tilak Kumar <kartilak@cisco.com> M: Narsimhulu Musini <nmusini@cisco.com> M: Sesidhar Baddela <sebaddel@cisco.com> L: linux-scsi@vger.kernel.org S: Supported Loading drivers/scsi/lpfc/lpfc_init.c +2 −0 Original line number Diff line number Diff line Loading @@ -12025,6 +12025,8 @@ lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba) iounmap(phba->sli4_hba.conf_regs_memmap_p); if (phba->sli4_hba.dpp_regs_memmap_p) iounmap(phba->sli4_hba.dpp_regs_memmap_p); if (phba->sli4_hba.dpp_regs_memmap_wc_p) iounmap(phba->sli4_hba.dpp_regs_memmap_wc_p); break; case LPFC_SLI_INTF_IF_TYPE_1: break; Loading drivers/scsi/lpfc/lpfc_sli.c +30 −6 Original line number Diff line number Diff line Loading @@ -15977,6 +15977,32 @@ lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset) return NULL; } static __maybe_unused void __iomem * lpfc_dpp_wc_map(struct lpfc_hba *phba, uint8_t dpp_barset) { /* DPP region is supposed to cover 64-bit BAR2 */ if (dpp_barset != WQ_PCI_BAR_4_AND_5) { lpfc_log_msg(phba, KERN_WARNING, LOG_INIT, "3273 dpp_barset x%x != WQ_PCI_BAR_4_AND_5\n", dpp_barset); return NULL; } if (!phba->sli4_hba.dpp_regs_memmap_wc_p) { void __iomem *dpp_map; dpp_map = ioremap_wc(phba->pci_bar2_map, pci_resource_len(phba->pcidev, PCI_64BIT_BAR4)); if (dpp_map) phba->sli4_hba.dpp_regs_memmap_wc_p = dpp_map; } return phba->sli4_hba.dpp_regs_memmap_wc_p; } /** * lpfc_modify_hba_eq_delay - Modify Delay Multiplier on EQs * @phba: HBA structure that EQs are on. Loading Loading @@ -16940,9 +16966,6 @@ lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq, uint8_t dpp_barset; uint32_t dpp_offset; uint8_t wq_create_version; #ifdef CONFIG_X86 unsigned long pg_addr; #endif /* sanity check on queue memory */ if (!wq || !cq) Loading Loading @@ -17128,14 +17151,15 @@ lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq, #ifdef CONFIG_X86 /* Enable combined writes for DPP aperture */ pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK; rc = set_memory_wc(pg_addr, 1); if (rc) { bar_memmap_p = lpfc_dpp_wc_map(phba, dpp_barset); if (!bar_memmap_p) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "3272 Cannot setup Combined " "Write on WQ[%d] - disable DPP\n", wq->queue_id); phba->cfg_enable_dpp = 0; } else { wq->dpp_regaddr = bar_memmap_p + dpp_offset; } #else phba->cfg_enable_dpp = 0; Loading drivers/scsi/lpfc/lpfc_sli4.h +3 −0 Original line number Diff line number Diff line Loading @@ -785,6 +785,9 @@ struct lpfc_sli4_hba { void __iomem *dpp_regs_memmap_p; /* Kernel memory mapped address for * dpp registers */ void __iomem *dpp_regs_memmap_wc_p;/* Kernel memory mapped address for * dpp registers with write combining */ union { struct { /* IF Type 0, BAR 0 PCI cfg space reg mem map */ Loading drivers/scsi/mpi3mr/mpi3mr_fw.c +19 −15 Original line number Diff line number Diff line Loading @@ -4807,6 +4807,7 @@ void mpi3mr_memset_buffers(struct mpi3mr_ioc *mrioc) } for (i = 0; i < mrioc->num_queues; i++) { if (mrioc->op_reply_qinfo) { mrioc->op_reply_qinfo[i].qid = 0; mrioc->op_reply_qinfo[i].ci = 0; mrioc->op_reply_qinfo[i].num_replies = 0; Loading @@ -4814,7 +4815,9 @@ void mpi3mr_memset_buffers(struct mpi3mr_ioc *mrioc) atomic_set(&mrioc->op_reply_qinfo[i].pend_ios, 0); atomic_set(&mrioc->op_reply_qinfo[i].in_use, 0); mpi3mr_memset_op_reply_q_buffers(mrioc, i); } if (mrioc->req_qinfo) { mrioc->req_qinfo[i].ci = 0; mrioc->req_qinfo[i].pi = 0; mrioc->req_qinfo[i].num_requests = 0; Loading @@ -4823,6 +4826,7 @@ void mpi3mr_memset_buffers(struct mpi3mr_ioc *mrioc) spin_lock_init(&mrioc->req_qinfo[i].q_lock); mpi3mr_memset_op_req_q_buffers(mrioc, i); } } atomic_set(&mrioc->pend_large_data_sz, 0); if (mrioc->throttle_groups) { Loading Loading
MAINTAINERS +1 −0 Original line number Diff line number Diff line Loading @@ -6213,6 +6213,7 @@ F: drivers/scsi/fnic/ CISCO SCSI HBA DRIVER M: Karan Tilak Kumar <kartilak@cisco.com> M: Narsimhulu Musini <nmusini@cisco.com> M: Sesidhar Baddela <sebaddel@cisco.com> L: linux-scsi@vger.kernel.org S: Supported Loading
drivers/scsi/lpfc/lpfc_init.c +2 −0 Original line number Diff line number Diff line Loading @@ -12025,6 +12025,8 @@ lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba) iounmap(phba->sli4_hba.conf_regs_memmap_p); if (phba->sli4_hba.dpp_regs_memmap_p) iounmap(phba->sli4_hba.dpp_regs_memmap_p); if (phba->sli4_hba.dpp_regs_memmap_wc_p) iounmap(phba->sli4_hba.dpp_regs_memmap_wc_p); break; case LPFC_SLI_INTF_IF_TYPE_1: break; Loading
drivers/scsi/lpfc/lpfc_sli.c +30 −6 Original line number Diff line number Diff line Loading @@ -15977,6 +15977,32 @@ lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset) return NULL; } static __maybe_unused void __iomem * lpfc_dpp_wc_map(struct lpfc_hba *phba, uint8_t dpp_barset) { /* DPP region is supposed to cover 64-bit BAR2 */ if (dpp_barset != WQ_PCI_BAR_4_AND_5) { lpfc_log_msg(phba, KERN_WARNING, LOG_INIT, "3273 dpp_barset x%x != WQ_PCI_BAR_4_AND_5\n", dpp_barset); return NULL; } if (!phba->sli4_hba.dpp_regs_memmap_wc_p) { void __iomem *dpp_map; dpp_map = ioremap_wc(phba->pci_bar2_map, pci_resource_len(phba->pcidev, PCI_64BIT_BAR4)); if (dpp_map) phba->sli4_hba.dpp_regs_memmap_wc_p = dpp_map; } return phba->sli4_hba.dpp_regs_memmap_wc_p; } /** * lpfc_modify_hba_eq_delay - Modify Delay Multiplier on EQs * @phba: HBA structure that EQs are on. Loading Loading @@ -16940,9 +16966,6 @@ lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq, uint8_t dpp_barset; uint32_t dpp_offset; uint8_t wq_create_version; #ifdef CONFIG_X86 unsigned long pg_addr; #endif /* sanity check on queue memory */ if (!wq || !cq) Loading Loading @@ -17128,14 +17151,15 @@ lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq, #ifdef CONFIG_X86 /* Enable combined writes for DPP aperture */ pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK; rc = set_memory_wc(pg_addr, 1); if (rc) { bar_memmap_p = lpfc_dpp_wc_map(phba, dpp_barset); if (!bar_memmap_p) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "3272 Cannot setup Combined " "Write on WQ[%d] - disable DPP\n", wq->queue_id); phba->cfg_enable_dpp = 0; } else { wq->dpp_regaddr = bar_memmap_p + dpp_offset; } #else phba->cfg_enable_dpp = 0; Loading
drivers/scsi/lpfc/lpfc_sli4.h +3 −0 Original line number Diff line number Diff line Loading @@ -785,6 +785,9 @@ struct lpfc_sli4_hba { void __iomem *dpp_regs_memmap_p; /* Kernel memory mapped address for * dpp registers */ void __iomem *dpp_regs_memmap_wc_p;/* Kernel memory mapped address for * dpp registers with write combining */ union { struct { /* IF Type 0, BAR 0 PCI cfg space reg mem map */ Loading
drivers/scsi/mpi3mr/mpi3mr_fw.c +19 −15 Original line number Diff line number Diff line Loading @@ -4807,6 +4807,7 @@ void mpi3mr_memset_buffers(struct mpi3mr_ioc *mrioc) } for (i = 0; i < mrioc->num_queues; i++) { if (mrioc->op_reply_qinfo) { mrioc->op_reply_qinfo[i].qid = 0; mrioc->op_reply_qinfo[i].ci = 0; mrioc->op_reply_qinfo[i].num_replies = 0; Loading @@ -4814,7 +4815,9 @@ void mpi3mr_memset_buffers(struct mpi3mr_ioc *mrioc) atomic_set(&mrioc->op_reply_qinfo[i].pend_ios, 0); atomic_set(&mrioc->op_reply_qinfo[i].in_use, 0); mpi3mr_memset_op_reply_q_buffers(mrioc, i); } if (mrioc->req_qinfo) { mrioc->req_qinfo[i].ci = 0; mrioc->req_qinfo[i].pi = 0; mrioc->req_qinfo[i].num_requests = 0; Loading @@ -4823,6 +4826,7 @@ void mpi3mr_memset_buffers(struct mpi3mr_ioc *mrioc) spin_lock_init(&mrioc->req_qinfo[i].q_lock); mpi3mr_memset_op_req_q_buffers(mrioc, i); } } atomic_set(&mrioc->pend_large_data_sz, 0); if (mrioc->throttle_groups) { Loading