Commit bf025a84 authored by Alexander Usyskin's avatar Alexander Usyskin Committed by Greg Kroah-Hartman
Browse files

mei: me: move trace into firmware status read



Move register trace near it actual read in the firmware status callback
and make it adhere to the actual read type.

Reviewed-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: default avatarAlexander Usyskin <alexander.usyskin@intel.com>
Link: https://patch.msgid.link/20260201094358.1440593-4-alexander.usyskin@intel.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent f3d0423d
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+2 −1
Original line number Diff line number Diff line
@@ -23,11 +23,12 @@

#define MEI_GSC_RPM_TIMEOUT 500

static int mei_gsc_read_hfs(const struct mei_device *dev, int where, u32 *val)
static int mei_gsc_read_hfs(const struct mei_device *dev, int where, const char *name, u32 *val)
{
	struct mei_me_hw *hw = to_me_hw(dev);

	*val = ioread32(hw->mem_addr + where + 0xC00);
	trace_mei_reg_read(&dev->dev, name, where, *val);

	return 0;
}
+3 −8
Original line number Diff line number Diff line
@@ -215,11 +215,8 @@ static int mei_me_fw_status(struct mei_device *dev,

	fw_status->count = fw_src->count;
	for (i = 0; i < fw_src->count && i < MEI_FW_STATUS_MAX; i++) {
		ret = hw->read_fws(dev, fw_src->status[i],
		ret = hw->read_fws(dev, fw_src->status[i], "PCI_CFG_HFS_X",
				   &fw_status->status[i]);
		trace_mei_pci_cfg_read(&dev->dev, "PCI_CFG_HFS_X",
				       fw_src->status[i],
				       fw_status->status[i]);
		if (ret)
			return ret;
	}
@@ -250,8 +247,7 @@ static int mei_me_hw_config(struct mei_device *dev)
	hw->hbuf_depth = (hcsr & H_CBD) >> 24;

	reg = 0;
	hw->read_fws(dev, PCI_CFG_HFS_1, &reg);
	trace_mei_pci_cfg_read(&dev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg);
	hw->read_fws(dev, PCI_CFG_HFS_1, "PCI_CFG_HFS_1", &reg);
	hw->d0i3_supported =
		((reg & PCI_CFG_HFS_1_D0I3_MSK) == PCI_CFG_HFS_1_D0I3_MSK);

@@ -446,8 +442,7 @@ static void mei_gsc_pxp_check(struct mei_device *dev)
	if (!kind_is_gsc(dev) && !kind_is_gscfi(dev))
		return;

	hw->read_fws(dev, PCI_CFG_HFS_5, &fwsts5);
	trace_mei_pci_cfg_read(&dev->dev, "PCI_CFG_HFS_5", PCI_CFG_HFS_5, fwsts5);
	hw->read_fws(dev, PCI_CFG_HFS_5, "PCI_CFG_HFS_5", &fwsts5);

	if ((fwsts5 & GSC_CFG_HFS_5_BOOT_TYPE_MSK) == GSC_CFG_HFS_5_BOOT_TYPE_PXP) {
		if (dev->gsc_reset_to_pxp == MEI_DEV_RESET_TO_PXP_DEFAULT)
+1 −1
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ struct mei_me_hw {
	enum mei_pg_state pg_state;
	bool d0i3_supported;
	u8 hbuf_depth;
	int (*read_fws)(const struct mei_device *dev, int where, u32 *val);
	int (*read_fws)(const struct mei_device *dev, int where, const char *name, u32 *val);
	/* polling */
	struct task_struct *polling_thread;
	wait_queue_head_t wait_active;
+6 −2
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@
#include "client.h"
#include "hw-me-regs.h"
#include "hw-me.h"
#include "mei-trace.h"

/* mei_pci_tbl - PCI Device ID Table */
static const struct pci_device_id mei_me_pci_tbl[] = {
@@ -145,11 +146,14 @@ static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
#endif /* CONFIG_PM */

static int mei_me_read_fws(const struct mei_device *dev, int where, u32 *val)
static int mei_me_read_fws(const struct mei_device *dev, int where, const char *name, u32 *val)
{
	struct pci_dev *pdev = to_pci_dev(dev->parent);
	int ret;

	return pci_read_config_dword(pdev, where, val);
	ret = pci_read_config_dword(pdev, where, val);
	trace_mei_pci_cfg_read(&dev->dev, name, where, *val);
	return ret;
}

/**