Unverified Commit c02138cf authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'juno-updates-6.11' of...

Merge tag 'juno-updates-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt

Arm Juno updates for v6.11

Addition of dedicated FPGA syscon compatible for Juno platforms. Also
enablement of GPU device node now that the panfrost driver is already
enabled as a module in defconfig.

* tag 'juno-updates-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: juno: Enable GPU
  arm64: dts: juno: add dedicated FPGA syscon compatible
  dt-bindings: arm: arm,juno-fpga-apb-regs: document FPGA syscon

Link: https://lore.kernel.org/r/20240620093924.375244-2-sudeep.holla@arm.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 88d81c86 75895aa2
Loading
Loading
Loading
Loading
+61 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/arm,juno-fpga-apb-regs.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ARM Juno FPGA APB Registers

maintainers:
  - Sudeep Holla <sudeep.holla@arm.com>

properties:
  compatible:
    items:
      - const: arm,juno-fpga-apb-regs
      - const: syscon
      - const: simple-mfd

  reg:
    maxItems: 1

  ranges: true

  "#address-cells":
    const: 1

  "#size-cells":
    const: 1

patternProperties:
  "^led@[0-9a-f]+,[0-9a-f]$":
    $ref: /schemas/leds/register-bit-led.yaml#

required:
  - compatible
  - reg
  - ranges
  - "#address-cells"
  - "#size-cells"

additionalProperties: false

examples:
  - |
    syscon@10000 {
        compatible = "arm,juno-fpga-apb-regs", "syscon", "simple-mfd";
        reg = <0x010000 0x1000>;
        ranges = <0x0 0x10000 0x1000>;
        #address-cells = <1>;
        #size-cells = <1>;

        led@8,0 {
            compatible = "register-bit-led";
            reg = <0x08 0x04>;
            offset = <0x08>;
            mask = <0x01>;
            label = "vexpress:0";
            linux,default-trigger = "heartbeat";
            default-state = "on";
        };
    };
+0 −1
Original line number Diff line number Diff line
@@ -663,7 +663,6 @@ gpu: gpu@2d000000 {
		dma-coherent;
		/* The SMMU is only really of interest to bare-metal hypervisors */
		/* iommus = <&smmu_gpu 0>; */
		status = "disabled";
	};

	sram: sram@2e000000 {
+2 −1
Original line number Diff line number Diff line
@@ -158,7 +158,8 @@ v2m_sysctl: sysctl@20000 {
				};

				apbregs@10000 {
					compatible = "syscon", "simple-mfd";
					compatible = "arm,juno-fpga-apb-regs",
						     "syscon", "simple-mfd";
					reg = <0x010000 0x1000>;
					ranges = <0x0 0x10000 0x1000>;
					#address-cells = <1>;