Commit c19dfb26 authored by Ulf Hansson's avatar Ulf Hansson Committed by Rafael J. Wysocki
Browse files

Documentation: power/cpuidle: Document the CPU system wakeup latency QoS 



Let's document how the new CPU system wakeup latency QoS limit can be used
from user space, along with how the constraint is taken into account for
s2idle and cpuidle.

Reviewed-by: default avatarDhruva Gole <d-gole@ti.com>
Reviewed-by: default avatarKevin Hilman (TI) <khilman@baylibre.com>
Tested-by: default avatarKevin Hilman (TI) <khilman@baylibre.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Link: https://patch.msgid.link/20251125112650.329269-7-ulf.hansson@linaro.org


Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 2b8d5947

Documentation/admin-guide/pm/cpuidle.rst

+9 −0
Original line number Diff line number Diff line
@@ -580,6 +580,15 @@ the given CPU as the upper limit for the exit latency of the idle states that 
they are allowed to select for that CPU.  They should never select any idle

states with exit latency beyond that limit.



While the above CPU QoS constraints apply to CPU idle time management, user

space may also request a CPU system wakeup latency QoS limit, via the

`cpu_wakeup_latency` file.  This QoS constraint is respected when selecting a

suitable idle state for the CPUs, while entering the system-wide suspend-to-idle

sleep state, but also to the regular CPU idle time management.



Note that, the management of the `cpu_wakeup_latency` file works according to

the 'cpu_dma_latency' file from user space point of view.  Moreover, the unit

is also microseconds.



Idle States Control Via Kernel Command Line

===========================================

Documentation/power/pm_qos_interface.rst

+5 −4
Original line number Diff line number Diff line
@@ -55,7 +55,8 @@ int cpu_latency_qos_request_active(handle): 


From user space:



The infrastructure exposes one device node, /dev/cpu_dma_latency, for the CPU

The infrastructure exposes two separate device nodes, /dev/cpu_dma_latency for

the CPU latency QoS and /dev/cpu_wakeup_latency for the CPU system wakeup

latency QoS.



Only processes can register a PM QoS request.  To provide for automatic
@@ -63,15 +64,15 @@ cleanup of a process, the interface requires the process to register its 
parameter requests as follows.



To register the default PM QoS target for the CPU latency QoS, the process must

open /dev/cpu_dma_latency.

open /dev/cpu_dma_latency.  To register a CPU system wakeup QoS limit, the

process must open /dev/cpu_wakeup_latency.



As long as the device node is held open that process has a registered

request on the parameter.



To change the requested target value, the process needs to write an s32 value to

the open device node.  Alternatively, it can write a hex string for the value

using the 10 char long format e.g. "0x12345678".  This translates to a

cpu_latency_qos_update_request() call.

using the 10 char long format e.g. "0x12345678".



To remove the user mode request for a target value simply close the device

node.