Commit c2ed087e authored by Madhavan Srinivasan's avatar Madhavan Srinivasan Committed by Michael Ellerman
Browse files

powerpc: Add Power11 architected and raw mode 



Add CPU table entries for raw and architected mode. Most fields are
copied from the Power10 table entries.

CPU, MMU and user (ELF_HWCAP) features are unchanged vs P10. However
userspace can detect P11 because the AT_PLATFORM value changes to
"power11".

The logical PVR value of 0x0F000007, passed to firmware via the
ibm_arch_vec, indicates the kernel can support a P11 compatible CPU,
which means at least ISA v3.1 compliant.

Signed-off-by: default avatarMadhavan Srinivasan <maddy@linux.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20240221044623.1598642-1-mpe@ellerman.id.au
parent 8c328de8

arch/powerpc/include/asm/cputable.h

+3 −0
Original line number Diff line number Diff line
@@ -454,6 +454,9 @@ static inline void cpu_feature_keys_init(void) { } 
	    CPU_FTR_ARCH_300 | CPU_FTR_ARCH_31 | \

	    CPU_FTR_DAWR | CPU_FTR_DAWR1 | \

	    CPU_FTR_DEXCR_NPHIE)



#define CPU_FTRS_POWER11	CPU_FTRS_POWER10



#define CPU_FTRS_CELL	(CPU_FTR_LWSYNC | \

	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \

	    CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \

arch/powerpc/include/asm/mmu.h

+1 −0
Original line number Diff line number Diff line
@@ -133,6 +133,7 @@ 
#define MMU_FTRS_POWER8		MMU_FTRS_POWER6

#define MMU_FTRS_POWER9		MMU_FTRS_POWER6

#define MMU_FTRS_POWER10	MMU_FTRS_POWER6

#define MMU_FTRS_POWER11	MMU_FTRS_POWER6

#define MMU_FTRS_CELL		MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \

				MMU_FTR_CI_LARGE_PAGE

#define MMU_FTRS_PA6T		MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \

arch/powerpc/include/asm/reg.h

+2 −0
Original line number Diff line number Diff line
@@ -1364,6 +1364,7 @@ 
#define PVR_HX_C2000	0x0066

#define PVR_POWER9	0x004E

#define PVR_POWER10	0x0080

#define PVR_POWER11	0x0082

#define PVR_BE		0x0070

#define PVR_PA6T	0x0090
@@ -1375,6 +1376,7 @@ 
#define PVR_ARCH_207	0x0f000004

#define PVR_ARCH_300	0x0f000005

#define PVR_ARCH_31	0x0f000006

#define PVR_ARCH_31_P11	0x0f000007



/* Macros for setting and retrieving special purpose registers */

#ifndef __ASSEMBLY__

arch/powerpc/kernel/cpu_specs_book3s_64.h

+34 −0
Original line number Diff line number Diff line
@@ -60,6 +60,9 @@ 
				 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \

				 PPC_FEATURE2_VEC_CRYPTO)



#define COMMON_USER_POWER11	COMMON_USER_POWER10

#define COMMON_USER2_POWER11	COMMON_USER2_POWER10



static struct cpu_spec cpu_specs[] __initdata = {

	{	/* PPC970 */

		.pvr_mask		= 0xffff0000,
@@ -281,6 +284,20 @@ static struct cpu_spec cpu_specs[] __initdata = { 
		.cpu_restore		= __restore_cpu_power10,

		.platform		= "power10",

	},

	{	/* 3.1-compliant processor, i.e. Power11 "architected" mode */

		.pvr_mask		= 0xffffffff,

		.pvr_value		= 0x0f000007,

		.cpu_name		= "Power11 (architected)",

		.cpu_features		= CPU_FTRS_POWER11,

		.cpu_user_features	= COMMON_USER_POWER11,

		.cpu_user_features2	= COMMON_USER2_POWER11,

		.mmu_features		= MMU_FTRS_POWER11,

		.icache_bsize		= 128,

		.dcache_bsize		= 128,

		.cpu_setup		= __setup_cpu_power10,

		.cpu_restore		= __restore_cpu_power10,

		.platform		= "power11",

	},

	{	/* Power7 */

		.pvr_mask		= 0xffff0000,

		.pvr_value		= 0x003f0000,
@@ -451,6 +468,23 @@ static struct cpu_spec cpu_specs[] __initdata = { 
		.machine_check_early	= __machine_check_early_realmode_p10,

		.platform		= "power10",

	},

	{	/* Power11 */

		.pvr_mask		= 0xffff0000,

		.pvr_value		= 0x00820000,

		.cpu_name		= "Power11 (raw)",

		.cpu_features		= CPU_FTRS_POWER11,

		.cpu_user_features	= COMMON_USER_POWER11,

		.cpu_user_features2	= COMMON_USER2_POWER11,

		.mmu_features		= MMU_FTRS_POWER11,

		.icache_bsize		= 128,

		.dcache_bsize		= 128,

		.num_pmcs		= 6,

		.pmc_type		= PPC_PMC_IBM,

		.cpu_setup		= __setup_cpu_power10,

		.cpu_restore		= __restore_cpu_power10,

		.machine_check_early	= __machine_check_early_realmode_p10,

		.platform		= "power11",

	},

	{	/* Cell Broadband Engine */

		.pvr_mask		= 0xffff0000,

		.pvr_value		= 0x00700000,

arch/powerpc/kernel/dt_cpu_ftrs.c

+10 −0
Original line number Diff line number Diff line
@@ -458,6 +458,14 @@ static int __init feat_enable_mce_power10(struct dt_cpu_feature *f) 
	return 1;

}



static int __init feat_enable_mce_power11(struct dt_cpu_feature *f)

{

	cur_cpu_spec->platform = "power11";

	cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p10;



	return 1;

}



static int __init feat_enable_tm(struct dt_cpu_feature *f)

{

#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
@@ -648,8 +656,10 @@ static struct dt_cpu_feature_match __initdata 
	{"pc-relative-addressing", feat_enable, 0},

	{"machine-check-power9", feat_enable_mce_power9, 0},

	{"machine-check-power10", feat_enable_mce_power10, 0},

	{"machine-check-power11", feat_enable_mce_power11, 0},

	{"performance-monitor-power9", feat_enable_pmu_power9, 0},

	{"performance-monitor-power10", feat_enable_pmu_power10, 0},

	{"performance-monitor-power11", feat_enable_pmu_power10, 0},

	{"event-based-branch-v3", feat_enable, 0},

	{"random-number-generator", feat_enable, 0},

	{"system-call-vectored", feat_disable, 0},