Commit c3c50e7d authored by Javier Carrasco's avatar Javier Carrasco Committed by Alexandre Belloni
Browse files

dt-bindings: rtc: armada-380-rtc: convert to dtschema 



Convert existing binding to dtschema to support validation.

This is a direct conversion with no additions.

Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarJavier Carrasco <javier.carrasco.cruz@gmail.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240326-rtc-yaml-v3-1-caa430ecace7@gmail.com


Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
parent 61c86d14

Documentation/devicetree/bindings/rtc/armada-380-rtc.txt

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* Real Time Clock of the Armada 38x/7K/8K SoCs



RTC controller for the Armada 38x, 7K and 8K SoCs



Required properties:

- compatible : Should be one of the following:

	"marvell,armada-380-rtc" for Armada 38x SoC

	"marvell,armada-8k-rtc" for Aramda 7K/8K SoCs

- reg: a list of base address and size pairs, one for each entry in

  reg-names

- reg names: should contain:

  * "rtc" for the RTC registers

  * "rtc-soc" for the SoC related registers and among them the one

    related to the interrupt.

- interrupts: IRQ line for the RTC.



Example:



rtc@a3800 {

	compatible = "marvell,armada-380-rtc";

	reg = <0xa3800 0x20>, <0x184a0 0x0c>;

	reg-names = "rtc", "rtc-soc";

	interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;

};

Documentation/devicetree/bindings/rtc/marvell,armada-380-rtc.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/rtc/marvell,armada-380-rtc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: RTC controller for the Armada 38x, 7K and 8K SoCs



maintainers:

  - Javier Carrasco <javier.carrasco.cruz@gmail.com>



allOf:

  - $ref: rtc.yaml#



properties:

  compatible:

    enum:

      - marvell,armada-380-rtc

      - marvell,armada-8k-rtc



  reg:

    items:

      - description: RTC base address size

      - description: Base address and size of SoC related registers



  reg-names:

    items:

      - const: rtc

      - const: rtc-soc



  interrupts:

    maxItems: 1



required:

  - compatible

  - reg

  - reg-names

  - interrupts



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    rtc@a3800 {

        compatible = "marvell,armada-380-rtc";

        reg = <0xa3800 0x20>, <0x184a0 0x0c>;

        reg-names = "rtc", "rtc-soc";

        interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;

    };