Commit c70f3163 authored by Yanteng Si's avatar Yanteng Si Committed by Paolo Abeni
Browse files

net: stmmac: dwmac-loongson: Init ref and PTP clocks rate 



Reference and PTP clocks rate of the Loongson GMAC devices is 125MHz.
(So is in the GNET devices which support is about to be added.) Set
the respective plat_stmmacenet_data field up in accordance with that
so to have the coalesce command and timestamping work correctly.

Fixes: 30bba69d ("stmmac: pci: Add dwmac support for Loongson")
Signed-off-by: default avatarFeiyang Chen <chenfeiyang@loongson.cn>
Signed-off-by: default avatarYinggang Gu <guyinggang@loongson.cn>
Reviewed-by: default avatarSerge Semin <fancer.lancer@gmail.com>
Acked-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
Signed-off-by: default avatarYanteng Si <siyanteng@loongson.cn>
Tested-by: default avatarSerge Semin <fancer.lancer@gmail.com>
Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 79afc700

drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c

+3 −0
Original line number Diff line number Diff line
@@ -35,6 +35,9 @@ static void loongson_default_data(struct plat_stmmacenet_data *plat) 
	/* Disable RX queues routing by default */

	plat->rx_queues_cfg[0].pkt_route = 0x0;



	plat->clk_ref_rate = 125000000;

	plat->clk_ptp_rate = 125000000;



	/* Default to phy auto-detection */

	plat->phy_addr = -1;