Commit c77a3d4a authored by Joseph S. Barrera III's avatar Joseph S. Barrera III Committed by Bjorn Andersson
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arm64: dts: qcom: sc7180: Add quackingstick dts files



Quackingstick is a trogdor-based board. These dts files are copies from
the downstream Chrome OS 5.4 kernel, but with downstream bits removed.

Signed-off-by: default avatarJoseph S. Barrera III <joebar@chromium.org>
Tested-by: default avatarStephen Boyd <swboyd@chromium.org>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220625183538.v14.2.I0977b1a08830d0caa8bfb1bdedb4ecceac709a7f@changeid
parent e0ff30b2
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@@ -79,6 +79,8 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r2.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-pompom-r2-lte.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-pompom-r3.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-pompom-r3-lte.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-quackingstick-r0.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-quackingstick-r0-lte.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-wormdingler-rev0-boe.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-wormdingler-rev0-inx.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-wormdingler-rev1-boe.dtb
+38 −0
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Google Quackingstick board device tree source
 *
 * Copyright 2021 Google LLC.
 *
 * SKU: 0x600 => 1536
 *  - bits 11..8: Panel ID: 0x6 (AUO)
 */

#include "sc7180-trogdor-quackingstick-r0.dts"
#include "sc7180-trogdor-lte-sku.dtsi"

/ {
	model = "Google Quackingstick (rev0+) with LTE";
	compatible = "google,quackingstick-sku1536", "qcom,sc7180";
};

&ap_sar_sensor {
	compatible = "semtech,sx9324";
	semtech,ph0-pin = <3 1 3>;
	semtech,ph1-pin = <2 1 2>;
	semtech,ph2-pin = <3 3 1>;
	semtech,ph3-pin = <1 3 3>;
	semtech,ph01-resolution = <1024>;
	semtech,ph23-resolution = <1024>;
	semtech,startup-sensor = <1>;
	semtech,ph01-proxraw-strength = <3>;
	semtech,ph23-proxraw-strength = <3>;
	semtech,avg-pos-strength = <256>;

	/delete-property/ svdd-supply;
	vdd-supply = <&pp1800_prox>;
};

&ap_sar_sensor_i2c {
	status = "okay";
};
+26 −0
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Google Quackingstick board device tree source
 *
 * Copyright 2021 Google LLC.
 *
 * SKU: 0x601 => 1537
 *  - bits 11..8: Panel ID: 0x6 (AUO)
 */

#include "sc7180-trogdor-quackingstick.dtsi"

/ {
	model = "Google Quackingstick (rev0+)";
	compatible = "google,quackingstick-sku1537", "qcom,sc7180";
};

&dsi_phy {
	qcom,phy-rescode-offset-top = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>;
	qcom,phy-rescode-offset-bot = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>;
	qcom,phy-drive-ldo-level = <375>;
};

&panel {
	compatible = "auo,b101uan08.3";
};
+318 −0
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Google Quackingstick board device tree source
 *
 * Copyright 2021 Google LLC.
 */

/dts-v1/;

#include "sc7180-trogdor.dtsi"

/* This board only has 1 USB Type-C port. */
/delete-node/ &usb_c1;

/ {
	ppvar_lcd: ppvar-lcd {
		compatible = "regulator-fixed";
		regulator-name = "ppvar_lcd";

		gpio = <&tlmm 88 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		pinctrl-names = "default";
		pinctrl-0 = <&ppvar_lcd_en>;

		vin-supply = <&pp5000_a>;
	};

	v1p8_disp: v1p8-disp {
		compatible = "regulator-fixed";
		regulator-name = "v1p8_disp";

		gpio = <&tlmm 86 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		pinctrl-names = "default";
		pinctrl-0 = <&pp1800_disp_on>;

		vin-supply = <&pp3300_a>;
	};
};

&backlight {
	pwms = <&cros_ec_pwm 0>;
};

&camcc {
	status = "okay";
};

&dsi0 {
	panel: panel@0 {
		/* Compatible will be filled in per-board */
		reg = <0>;
		enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&lcd_rst>;
		avdd-supply = <&ppvar_lcd>;
		pp1800-supply = <&v1p8_disp>;
		pp3300-supply = <&pp3300_dx_edp>;
		backlight = <&backlight>;
		rotation = <270>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			port@0 {
				reg = <0>;
				panel_in: endpoint {
					remote-endpoint = <&dsi0_out>;
				};
			};
		};
	};

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&panel_in>;
				data-lanes = <0 1 2 3>;
			};
		};
	};
};

&gpio_keys {
	status = "okay";
};

&i2c4 {
	status = "okay";
	clock-frequency = <400000>;

	ap_ts: touchscreen@10 {
		compatible = "hid-over-i2c";
		reg = <0x10>;
		pinctrl-names = "default";
		pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;

		interrupt-parent = <&tlmm>;
		interrupts = <9 IRQ_TYPE_LEVEL_LOW>;

		post-power-on-delay-ms = <20>;
		hid-descr-addr = <0x0001>;

		vdd-supply = <&pp3300_ts>;
	};
};

&sdhc_2 {
	status = "okay";
};

&pp1800_uf_cam {
	status = "okay";
};

&pp1800_wf_cam {
	status = "okay";
};

&pp2800_uf_cam {
	status = "okay";
};

&pp2800_wf_cam {
	status = "okay";
};

/*
 * No eDP on this board but it's logically the same signal so just give it
 * a new name and assign the proper GPIO.
 */
pp3300_disp_on: &pp3300_dx_edp {
	gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>;
};

/* PINCTRL - modifications to sc7180-trogdor.dtsi */

/*
 * No eDP on this board but it's logically the same signal so just give it
 * a new name and assign the proper GPIO.
 */

tp_en: &en_pp3300_dx_edp {
	pinmux {
		pins = "gpio67";
	};

	pinconf {
		pins = "gpio67";
	};
};

/* PINCTRL - board-specific pinctrl */

&tlmm {
	gpio-line-names = "HUB_RST_L",
			  "AP_RAM_ID0",
			  "AP_SKU_ID2",
			  "AP_RAM_ID1",
			  "",
			  "AP_RAM_ID2",
			  "UF_CAM_EN",
			  "WF_CAM_EN",
			  "TS_RESET_L",
			  "TS_INT_L",
			  "",
			  "",
			  "AP_EDP_BKLTEN",
			  "UF_CAM_MCLK",
			  "WF_CAM_CLK",
			  "EDP_BRIJ_I2C_SDA",
			  "EDP_BRIJ_I2C_SCL",
			  "UF_CAM_SDA",
			  "UF_CAM_SCL",
			  "WF_CAM_SDA",
			  "WF_CAM_SCL",
			  "",
			  "",
			  "AMP_EN",
			  "P_SENSOR_INT_L",
			  "AP_SAR_SENSOR_SDA",
			  "AP_SAR_SENSOR_SCL",
			  "",
			  "HP_IRQ",
			  "WF_CAM_RST_L",
			  "UF_CAM_RST_L",
			  "AP_BRD_ID2",
			  "",
			  "AP_BRD_ID0",
			  "AP_H1_SPI_MISO",
			  "AP_H1_SPI_MOSI",
			  "AP_H1_SPI_CLK",
			  "AP_H1_SPI_CS_L",
			  "",
			  "",
			  "",
			  "",
			  "H1_AP_INT_ODL",
			  "",
			  "UART_AP_TX_DBG_RX",
			  "UART_DBG_TX_AP_RX",
			  "HP_I2C_SDA",
			  "HP_I2C_SCL",
			  "FORCED_USB_BOOT",
			  "",
			  "",
			  "AMP_DIN",
			  "PEN_DET_ODL",
			  "HP_BCLK",
			  "HP_LRCLK",
			  "HP_DOUT",
			  "HP_DIN",
			  "HP_MCLK",
			  "AP_SKU_ID0",
			  "AP_EC_SPI_MISO",
			  "AP_EC_SPI_MOSI",
			  "AP_EC_SPI_CLK",
			  "AP_EC_SPI_CS_L",
			  "AP_SPI_CLK",
			  "AP_SPI_MOSI",
			  "AP_SPI_MISO",
			  /*
			   * AP_FLASH_WP_L is crossystem ABI. Schematics
			   * call it BIOS_FLASH_WP_L.
			   */
			  "AP_FLASH_WP_L",
			  "EN_PP3300_DX_EDP",
			  "AP_SPI_CS0_L",
			  "SD_CD_ODL",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "UIM2_DATA",
			  "UIM2_CLK",
			  "UIM2_RST",
			  "UIM2_PRESENT_L",
			  "UIM1_DATA",
			  "UIM1_CLK",
			  "UIM1_RST",
			  "",
			  "CODEC_PWR_EN",
			  "HUB_EN",
			  "",
			  "PP1800_DISP_ON",
			  "LCD_RST",
			  "PPVAR_LCD_EN",
			  "",
			  "AP_SKU_ID1",
			  "AP_RST_REQ",
			  "",
			  "AP_BRD_ID1",
			  "AP_EC_INT_L",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "AP_TS_I2C_SDA",
			  "AP_TS_I2C_SCL",
			  "DP_HOT_PLUG_DET",
			  "EC_IN_RW_ODL";

	lcd_rst: lcd-rst {
		pinmux {
			pins = "gpio87";
			function = "gpio";
		};

		pinconf {
			pins = "gpio87";
			drive-strength = <2>;
			bias-disable;
		};
	};

	ppvar_lcd_en: ppvar-lcd-en {
		pinmux {
			pins = "gpio88";
			function = "gpio";
		};

		pinconf {
			pins = "gpio88";
			drive-strength = <2>;
			bias-disable;
		};
	};

	pp1800_disp_on: pp1800-disp-on {
		pinmux {
			pins = "gpio86";
			function = "gpio";
		};

		pinconf {
			pins = "gpio86";
			drive-strength = <2>;
			bias-disable;
		};
	};
};