Commit c7ae396e authored by Heiner Kallweit's avatar Heiner Kallweit Committed by Bjorn Helgaas
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PCI: Annotate pci_cache_line_size variables as __ro_after_init 

Annotate both variables as __ro_after_init, enforcing that they can't be
changed after the init phase.

Link: https://lore.kernel.org/r/52fd058d-6d72-48db-8e61-5fcddcd0aa51@gmail.com


Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent e30556bf

drivers/pci/pci.c

+2 −2
Original line number Diff line number Diff line
@@ -142,8 +142,8 @@ enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_DEFAULT; 
 * the dfl or actual value as it sees fit.  Don't forget this is

 * measured in 32-bit words, not bytes.

 */

u8 pci_dfl_cache_line_size = L1_CACHE_BYTES >> 2;

u8 pci_cache_line_size;

u8 pci_dfl_cache_line_size __ro_after_init = L1_CACHE_BYTES >> 2;

u8 pci_cache_line_size __ro_after_init ;



/*

 * If we set up a device for bus mastering, we need to check the latency