Commit c7e09a61 authored by Christophe JAILLET's avatar Christophe JAILLET Committed by Chen-Yu Tsai
Browse files

clk: sunxi-ng: Constify struct ccu_reset_map 



'struct ccu_reset_map' are not modified in these drivers.

Constifying this structure moves some data to a read-only section, so
increase overall security.

On a x86_64, with allmodconfig, as an example:
Before:
======
   text	   data	    bss	    dec	    hex	filename
   1533	   2224	      0	   3757	    ead	drivers/clk/sunxi-ng/ccu-sun20i-d1-r.o

After:
=====
   text	   data	    bss	    dec	    hex	filename
   1597	   2160	      0	   3757	    ead	drivers/clk/sunxi-ng/ccu-sun20i-d1-r.o

Signed-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://patch.msgid.link/44745f27034fa670605cd16966a39b7fe88fe5a6.1726863905.git.christophe.jaillet@wanadoo.fr


Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent d0c322b6

drivers/clk/sunxi-ng/ccu-sun20i-d1-r.c

+1 −1
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@ static struct clk_hw_onecell_data sun20i_d1_r_hw_clks = { 
	},

};



static struct ccu_reset_map sun20i_d1_r_ccu_resets[] = {

static const struct ccu_reset_map sun20i_d1_r_ccu_resets[] = {

	[RST_BUS_R_TIMER]	= { 0x11c, BIT(16) },

	[RST_BUS_R_TWD]		= { 0x12c, BIT(16) },

	[RST_BUS_R_PPU]		= { 0x1ac, BIT(16) },

drivers/clk/sunxi-ng/ccu-sun20i-d1.c

+1 −1
Original line number Diff line number Diff line
@@ -1232,7 +1232,7 @@ static struct clk_hw_onecell_data sun20i_d1_hw_clks = { 
	},

};



static struct ccu_reset_map sun20i_d1_ccu_resets[] = {

static const struct ccu_reset_map sun20i_d1_ccu_resets[] = {

	[RST_MBUS]		= { 0x540, BIT(30) },

	[RST_BUS_DE]		= { 0x60c, BIT(16) },

	[RST_BUS_DI]		= { 0x62c, BIT(16) },

drivers/clk/sunxi-ng/ccu-sun4i-a10.c

+1 −1
Original line number Diff line number Diff line
@@ -1382,7 +1382,7 @@ static struct clk_hw_onecell_data sun7i_a20_hw_clks = { 
	.num	= CLK_NUMBER_SUN7I,

};



static struct ccu_reset_map sunxi_a10_a20_ccu_resets[] = {

static const struct ccu_reset_map sunxi_a10_a20_ccu_resets[] = {

	[RST_USB_PHY0]		= { 0x0cc, BIT(0) },

	[RST_USB_PHY1]		= { 0x0cc, BIT(1) },

	[RST_USB_PHY2]		= { 0x0cc, BIT(2) },

drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c

+1 −1
Original line number Diff line number Diff line
@@ -166,7 +166,7 @@ static struct clk_hw_onecell_data sun50i_a100_r_hw_clks = { 
	.num	= CLK_NUMBER,

};



static struct ccu_reset_map sun50i_a100_r_ccu_resets[] = {

static const struct ccu_reset_map sun50i_a100_r_ccu_resets[] = {

	[RST_R_APB1_TIMER]	=  { 0x11c, BIT(16) },

	[RST_R_APB1_BUS_PWM]	=  { 0x13c, BIT(16) },

	[RST_R_APB1_PPU]	=  { 0x17c, BIT(16) },

drivers/clk/sunxi-ng/ccu-sun50i-a100.c

+1 −1
Original line number Diff line number Diff line
@@ -1061,7 +1061,7 @@ static struct clk_hw_onecell_data sun50i_a100_hw_clks = { 
	.num = CLK_NUMBER,

};



static struct ccu_reset_map sun50i_a100_ccu_resets[] = {

static const struct ccu_reset_map sun50i_a100_ccu_resets[] = {

	[RST_MBUS]		= { 0x540, BIT(30) },



	[RST_BUS_DE]		= { 0x60c, BIT(16) },