Commit c8bee3ff authored Jul 17, 2024 by Dmitry Baryshkov Committed by Bjorn Andersson Jul 31, 2024

clk: qcom: dispcc-sm8550: use rcg2_shared_ops for ESC RCGs

Follow the recommendations and park disp_cc_mdss_esc[01]_clk_src to the
XO instead of disabling the clocks by using the clk_rcg2_shared_ops.

Fixes: 90114ca1 ("clk: qcom: add SM8550 DISPCC driver")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240717-dispcc-sm8550-fixes-v2-5-5c4a3128c40b@linaro.org

Signed-off-by: Bjorn Andersson <andersson@kernel.org>

parent 7de10ddb

drivers/clk/qcom/dispcc-sm8550.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -562,7 +562,7 @@ static struct clk_rcg2 disp_cc_mdss_esc0_clk_src = {
		.parent_data = disp_cc_parent_data_5,
		.num_parents = ARRAY_SIZE(disp_cc_parent_data_5),
		.flags = CLK_SET_RATE_PARENT,
		.ops = &clk_rcg2_ops,
		.ops = &clk_rcg2_shared_ops,
		},
		};

		@@ -577,7 +577,7 @@ static struct clk_rcg2 disp_cc_mdss_esc1_clk_src = {
		.parent_data = disp_cc_parent_data_5,
		.num_parents = ARRAY_SIZE(disp_cc_parent_data_5),
		.flags = CLK_SET_RATE_PARENT,
		.ops = &clk_rcg2_ops,
		.ops = &clk_rcg2_shared_ops,
		},
		};