Commit c9068eb2 authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: add r1xx/r2xx support for CS_KEEP_TILING_FLAGS 



Previous patch only updates r3xx+.  It's not likely
anyone will use this on r1xx/r2xx, but add it for consistency.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 9292f37e

drivers/gpu/drm/radeon/r100.c

+26 −20
Original line number Diff line number Diff line
@@ -87,10 +87,12 @@ int r100_reloc_pitch_offset(struct radeon_cs_parser *p, 
		r100_cs_dump_packet(p, pkt);

		return r;

	}



	value = radeon_get_ib_value(p, idx);

	tmp = value & 0x003fffff;

	tmp += (((u32)reloc->lobj.gpu_offset) >> 10);



	if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) {

		if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)

			tile_flags |= RADEON_DST_TILE_MACRO;

		if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) {
@@ -104,6 +106,8 @@ int r100_reloc_pitch_offset(struct radeon_cs_parser *p, 


		tmp |= tile_flags;

		p->ib->ptr[idx] = (value & 0x3fc00000) | tmp;

	} else

		p->ib->ptr[idx] = (value & 0xffc00000) | tmp;

	return 0;

}
@@ -1625,7 +1629,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p, 
			r100_cs_dump_packet(p, pkt);

			return r;

		}



		if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) {

			if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)

				tile_flags |= RADEON_COLOR_TILE_ENABLE;

			if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
@@ -1634,6 +1638,8 @@ static int r100_packet0_check(struct radeon_cs_parser *p, 
			tmp = idx_value & ~(0x7 << 16);

			tmp |= tile_flags;

			ib[idx] = tmp;

		} else

			ib[idx] = idx_value;



		track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK;

		track->cb_dirty = true;

drivers/gpu/drm/radeon/r200.c

+10 −7
Original line number Diff line number Diff line
@@ -277,6 +277,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, 
			return r;

		}



		if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) {

			if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)

				tile_flags |= RADEON_COLOR_TILE_ENABLE;

			if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
@@ -285,6 +286,8 @@ int r200_packet0_check(struct radeon_cs_parser *p, 
			tmp = idx_value & ~(0x7 << 16);

			tmp |= tile_flags;

			ib[idx] = tmp;

		} else

			ib[idx] = idx_value;



		track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK;

		track->cb_dirty = true;