Commit ca596b78 authored by Animesh Manna's avatar Animesh Manna
Browse files

drm/i915/psr: Disable psr1 if setup_time > vblank



Issue is seen when PSR enabled with setup frames and when try to disable
PSR at SRDONACK State (0x1). PSR FSM is stuck at SRDONACK(0x1) for more
than 5 seconds. Issue not seen with Setup frames disabled. Currently
disable psr1 if setuptime > vblank to workaround the above issue.

HSD: 16024594674
WA: 18037818876

v1: Initial version
v2: Add debug log and some cosmetic changes. [Jouni, Jani, Nemesa]

Signed-off-by: default avatarAnimesh Manna <animesh.manna@intel.com>
Reviewed-by: default avatarJouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241105103916.1857731-1-animesh.manna@intel.com
parent d58f65df
Loading
Loading
Loading
Loading
+16 −0
Original line number Diff line number Diff line
@@ -1637,6 +1637,15 @@ _panel_replay_compute_config(struct intel_dp *intel_dp,
	return true;
}

static bool intel_psr_needs_wa_18037818876(struct intel_dp *intel_dp,
					   struct intel_crtc_state *crtc_state)
{
	struct intel_display *display = to_intel_display(intel_dp);

	return (DISPLAY_VER(display) == 20 && intel_dp->psr.entry_setup_frames > 0 &&
		!crtc_state->has_sel_update);
}

void intel_psr_compute_config(struct intel_dp *intel_dp,
			      struct intel_crtc_state *crtc_state,
			      struct drm_connector_state *conn_state)
@@ -1689,6 +1698,13 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
		return;

	crtc_state->has_sel_update = intel_sel_update_config_valid(intel_dp, crtc_state);

	/* Wa_18037818876 */
	if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) {
		crtc_state->has_psr = false;
		drm_dbg_kms(display->drm,
			    "PSR disabled to workaround PSR FSM hang issue\n");
	}
}

void intel_psr_get_config(struct intel_encoder *encoder,