Commit ca5d4db8 authored by Xiaogang Chen's avatar Xiaogang Chen Committed by Alex Deucher
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drm/amdgpu: Use correct address to setup gart page table for vram access



Use dst input parameter to setup gart page table entries instead of using fixed
location.

Fixes: 237d623a ("drm/amdgpu/gart: Add helper to bind VRAM pages (v2)")
Signed-off-by: default avatarXiaogang Chen <xiaogang.chen@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 39c21b81
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+2 −2
Original line number Diff line number Diff line
@@ -375,7 +375,7 @@ void amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
 * @start_page: first page to map in the GART aperture
 * @num_pages: number of pages to be mapped
 * @flags: page table entry flags
 * @dst: CPU address of the GART table
 * @dst: valid CPU address of GART table, cannot be null
 *
 * Binds a BO that is allocated in VRAM to the GART page table
 * (all ASICs).
@@ -396,7 +396,7 @@ void amdgpu_gart_map_vram_range(struct amdgpu_device *adev, uint64_t pa,
		return;

	for (i = 0; i < num_pages; ++i) {
		amdgpu_gmc_set_pte_pde(adev, adev->gart.ptr,
		amdgpu_gmc_set_pte_pde(adev, dst,
			start_page + i, pa + AMDGPU_GPU_PAGE_SIZE * i, flags);
	}