Commit ca81a1a1 authored by Herbert Xu's avatar Herbert Xu
Browse files

crypto: crc32c - Kill pointless CRYPTO_CRC32C_X86_64 option 



This bool option can never be set to anything other than y.  So
let's just kill it.

Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 32dc43e4

arch/x86/crypto/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -52,5 +52,5 @@ aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o fpu.o 
ghash-clmulni-intel-y := ghash-clmulni-intel_asm.o ghash-clmulni-intel_glue.o

sha1-ssse3-y := sha1_ssse3_asm.o sha1_ssse3_glue.o

crc32c-intel-y := crc32c-intel_glue.o

crc32c-intel-$(CONFIG_CRYPTO_CRC32C_X86_64) += crc32c-pcl-intel-asm_64.o

crc32c-intel-$(CONFIG_64BIT) += crc32c-pcl-intel-asm_64.o

crc32-pclmul-y := crc32-pclmul_asm.o crc32-pclmul_glue.o

crypto/Kconfig

+0 −10
Original line number Diff line number Diff line
@@ -322,19 +322,9 @@ config CRYPTO_CRC32C 
	  by iSCSI for header and data digests and by others.

	  See Castagnoli93.  Module will be crc32c.



config CRYPTO_CRC32C_X86_64

	bool

	depends on X86 && 64BIT

	select CRYPTO_HASH

	help

	  In Intel processor with SSE4.2 supported, the processor will

	  support CRC32C calculation using hardware accelerated CRC32

	  instruction optimized with PCLMULQDQ instruction when available.



config CRYPTO_CRC32C_INTEL

	tristate "CRC32c INTEL hardware acceleration"

	depends on X86

	select CRYPTO_CRC32C_X86_64 if 64BIT

	select CRYPTO_HASH

	help

	  In Intel processor with SSE4.2 supported, the processor will