Commit caf41eb4 authored by John Madieu's avatar John Madieu Committed by Daniel Lezcano
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dt-bindings: thermal: r9a09g047-tsu: Document the TSU unit 



The Renesas RZ/G3E SoC includes a Thermal Sensor Unit (TSU) block designed
to measure the junction temperature. The device provides real-time
temperature measurements for thermal management, utilizing a single
dedicated channel (channel 1) for temperature sensing.

Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Signed-off-by: default avatarJohn Madieu <john.madieu.xa@bp.renesas.com>
Link: https://lore.kernel.org/r/20250917170202.197929-2-john.madieu.xa@bp.renesas.com


Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent 3762f585

Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/thermal/renesas,r9a09g047-tsu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Renesas RZ/G3E Temperature Sensor Unit (TSU)



maintainers:

  - John Madieu <john.madieu.xa@bp.renesas.com>



description:

  The Temperature Sensor Unit (TSU) is an integrated thermal sensor that

  monitors the chip temperature on the Renesas RZ/G3E SoC. The TSU provides

  real-time temperature measurements for thermal management.



properties:

  compatible:

    const: renesas,r9a09g047-tsu



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  resets:

    maxItems: 1



  power-domains:

    maxItems: 1



  interrupts:

    items:

      - description: Conversion complete interrupt signal (pulse)

      - description: Comparison result interrupt signal (level)



  interrupt-names:

    items:

      - const: adi

      - const: adcmpi



  "#thermal-sensor-cells":

    const: 0



  renesas,tsu-trim:

    $ref: /schemas/types.yaml#/definitions/phandle-array

    items:

      - items:

          - description: phandle to system controller

          - description: offset of trim registers

    description:

      Phandle and offset to the system controller containing the TSU

      calibration trim values. The offset points to the first trim register

      (OTPTSU1TRMVAL0), with the second trim register (OTPTSU1TRMVAL1) located

      at offset + 4.



required:

  - compatible

  - reg

  - clocks

  - resets

  - power-domains

  - interrupts

  - interrupt-names

  - "#thermal-sensor-cells"

  - renesas,tsu-trim



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/renesas,r9a09g047-cpg.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    thermal-sensor@14002000 {

        compatible = "renesas,r9a09g047-tsu";

        reg = <0x14002000 0x1000>;

        clocks = <&cpg CPG_MOD 0x10a>;

        resets = <&cpg 0xf8>;

        power-domains = <&cpg>;

        interrupts = <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,

                     <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;

        interrupt-names = "adi", "adcmpi";

        #thermal-sensor-cells = <0>;

        renesas,tsu-trim = <&sys 0x330>;

    };