Commit cb794619 authored by Peng Fan's avatar Peng Fan Committed by Frank Li
Browse files

dt-bindings: fsl: imx7ulp-smc1: Add #clock-cells property 



The SMC1 block on i.MX7ULP is already used as a clock provider in
imx7ulp.dtsi, but the corresponding dt-binding schema does not define
the required '#clock-cells' property. This results in CHECK_DTBS schema
validation errors.

Functionally, SMC1 controls the CPU run mode configuration:
  - 00b: Normal Run (RUN)
  - 10b: Very-Low-Power Run (VLPR)
  - 11b: High-Speed Run (HSRUN)

These run modes determine the effective CPU operating point, and their
programming is tied to the OPP table.

Add the missing `#clock-cells` definition so the dt-binding schema is
consistent with the DTS and validates correctly.

Fixes: 8ba41d6b ("dt-bindings: fsl: Convert i.MX7ULP PM to json-schema")
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
parent ebe69512

Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml

+5 −0
Original line number Diff line number Diff line
@@ -28,6 +28,9 @@ properties: 
  reg:

    maxItems: 1



  '#clock-cells':

    const: 1



  clocks:

    maxItems: 2
@@ -39,6 +42,7 @@ properties: 
required:

  - compatible

  - reg

  - '#clock-cells'



additionalProperties: false
@@ -47,4 +51,5 @@ examples: 
    smc1@40410000 {

        compatible = "fsl,imx7ulp-smc1";

        reg = <0x40410000 0x1000>;

        #clock-cells = <1>;

    };