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phy: qcom-qmp-ufs: Refactor phy_power_on and phy_calibrate callbacks
Commit 052553af ("ufs/phy: qcom: Refactor to use phy_init call") puts enabling regulators & clks, calibrating UFS PHY, starting serdes and polling PCS ready status into phy_power_on. In Current code regulators enable, clks enable, calibrating UFS PHY, start_serdes and polling PCS_ready_status are part of phy_power_on. UFS PHY registers are retained after power collapse, meaning calibrating UFS PHY, start_serdes and polling PCS_ready_status can be done only when hba is powered_on, and not needed every time when phy_power_on is called during resume. Hence keep the code which enables PHY's regulators & clks in phy_power_on and move the rest steps into phy_calibrate function. Refactor the code to retain PHY regulators & clks in phy_power_on and move out rest of the code to new phy_calibrate function. Also move reset_control_assert to qmp_ufs_phy_calibrate to align with Hardware programming guide. Reviewed-by:Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Co-developed-by:
Can Guo <quic_cang@quicinc.com> Signed-off-by:
Can Guo <quic_cang@quicinc.com> Signed-off-by:
Nitin Rawat <quic_nitirawa@quicinc.com> Link: https://lore.kernel.org/r/20250526153821.7918-5-quic_nitirawa@quicinc.com Signed-off-by:
Vinod Koul <vkoul@kernel.org>