Commit ccd5bc53 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915: pass dev_priv explicitly to PSR_EVENT 



Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PSR_EVENT register macro.

Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9bc5819afa46416eb8f12ac050ed4d3bcde34b63.1714471597.git.jani.nikula@intel.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 9b0dddd5

drivers/gpu/drm/i915/display/intel_psr.c

+3 −1
Original line number Diff line number Diff line
@@ -415,7 +415,9 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir) 
		if (DISPLAY_VER(dev_priv) >= 9) {

			u32 val;



			val = intel_de_rmw(dev_priv, PSR_EVENT(cpu_transcoder), 0, 0);

			val = intel_de_rmw(dev_priv,

					   PSR_EVENT(dev_priv, cpu_transcoder),

					   0, 0);



			psr_event_print(dev_priv, val, intel_dp->psr.psr2_enabled);

		}

drivers/gpu/drm/i915/display/intel_psr_regs.h

+1 −1
Original line number Diff line number Diff line
@@ -195,7 +195,7 @@ 
#define _PSR_EVENT_TRANS_C			0x62848

#define _PSR_EVENT_TRANS_D			0x63848

#define _PSR_EVENT_TRANS_EDP			0x6f848

#define PSR_EVENT(tran)				_MMIO_TRANS2(dev_priv, tran, _PSR_EVENT_TRANS_A)

#define PSR_EVENT(dev_priv, tran)				_MMIO_TRANS2(dev_priv, tran, _PSR_EVENT_TRANS_A)

#define  PSR_EVENT_PSR2_WD_TIMER_EXPIRE		REG_BIT(17)

#define  PSR_EVENT_PSR2_DISABLED		REG_BIT(16)

#define  PSR_EVENT_SU_DIRTY_FIFO_UNDERRUN	REG_BIT(15)