Commit cd10fb79 authored by Luca Weiss's avatar Luca Weiss Committed by Bjorn Andersson
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arm64: dts: qcom: sm6350: add debug uart 



Add the necessary nodes for the debug uart on SM6350.

Signed-off-by: default avatarLuca Weiss <luca@z3ntu.xyz>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-8-luca@z3ntu.xyz
parent d8a3c775

arch/arm64/boot/dts/qcom/sm6350.dtsi

+31 −0
Original line number Diff line number Diff line
@@ -443,6 +443,30 @@ opp-384000000 { 
			};

		};



		qupv3_id_1: geniqup@9c0000 {

			compatible = "qcom,geni-se-qup";

			reg = <0x0 0x9c0000 0x0 0x2000>;

			clock-names = "m-ahb", "s-ahb";

			clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,

				 <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;

			#address-cells = <2>;

			#size-cells = <2>;

			iommus = <&apps_smmu 0x4c3 0x0>;

			ranges;

			status = "disabled";



			uart2: serial@98c000 {

				compatible = "qcom,geni-debug-uart";

				reg = <0 0x98c000 0 0x4000>;

				clock-names = "se";

				clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;

				pinctrl-names = "default";

				pinctrl-0 = <&qup_uart2_default>;

				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;

				status = "disabled";

			};

		};



		tcsr_mutex: hwlock@1f40000 {

			compatible = "qcom,tcsr-mutex";

			reg = <0x0 0x01f40000 0x0 0x40000>;
@@ -670,6 +694,13 @@ tlmm: pinctrl@f100000 { 
			interrupt-controller;

			#interrupt-cells = <2>;

			gpio-ranges = <&tlmm 0 0 157>;



			qup_uart2_default: qup-uart2-default {

				pins = "gpio25", "gpio26";

				function = "qup13_f2";

				drive-strength = <2>;

				bias-disable;

			};

		};



		apps_smmu: iommu@15000000 {