Commit cd6f12e1 authored by Oleksij Rempel's avatar Oleksij Rempel Committed by Jakub Kicinski
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net: phy: dp83tg720: wake up PHYs in managed mode



In case this PHY is bootstrapped for managed mode, we need to manually
wake it. Otherwise no link will be detected.

Cc: stable@vger.kernel.org
Fixes: cb80ee2f ("net: phy: Add support for the DP83TG720S Ethernet PHY")
Signed-off-by: default avatarOleksij Rempel <o.rempel@pengutronix.de>
Link: https://lore.kernel.org/r/20240614094516.1481231-1-o.rempel@pengutronix.de


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent e2b447c9
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+15 −3
Original line number Diff line number Diff line
@@ -17,6 +17,11 @@
#define DP83TG720S_PHY_RESET			0x1f
#define DP83TG720S_HW_RESET			BIT(15)

#define DP83TG720S_LPS_CFG3			0x18c
/* Power modes are documented as bit fields but used as values */
/* Power Mode 0 is Normal mode */
#define DP83TG720S_LPS_CFG3_PWR_MODE_0		BIT(0)

#define DP83TG720S_RGMII_DELAY_CTRL		0x602
/* In RGMII mode, Enable or disable the internal delay for RXD */
#define DP83TG720S_RGMII_RX_CLK_SEL		BIT(1)
@@ -154,10 +159,17 @@ static int dp83tg720_config_init(struct phy_device *phydev)
	 */
	usleep_range(1000, 2000);

	if (phy_interface_is_rgmii(phydev))
		return dp83tg720_config_rgmii_delay(phydev);
	if (phy_interface_is_rgmii(phydev)) {
		ret = dp83tg720_config_rgmii_delay(phydev);
		if (ret)
			return ret;
	}

	return 0;
	/* In case the PHY is bootstrapped in managed mode, we need to
	 * wake it.
	 */
	return phy_write_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_LPS_CFG3,
			     DP83TG720S_LPS_CFG3_PWR_MODE_0);
}

static struct phy_driver dp83tg720_driver[] = {