Commit ceb7114c authored by Jonathan Kim's avatar Jonathan Kim Committed by Alex Deucher
Browse files

drm/amdkfd: flag per-sdma queue reset supported to user space 



Similar to compute queue reset, flag SDMA queue reset capabilities to
user space for safe testing.

Signed-off-by: default avatarJonathan Kim <jonathan.kim@amd.com>
Reviewed-by: default avatarHarish Kasiviswanathan <harish.kasiviswanathan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bac38ca8

drivers/gpu/drm/amd/amdkfd/kfd_topology.c

+5 −0
Original line number Diff line number Diff line
@@ -519,6 +519,8 @@ static ssize_t node_show(struct kobject *kobj, struct attribute *attr, 
				      dev->gpu->kfd->mec_fw_version);

		sysfs_show_32bit_prop(buffer, offs, "capability",

				      dev->node_props.capability);

		sysfs_show_32bit_prop(buffer, offs, "capability2",

				      dev->node_props.capability2);

		sysfs_show_64bit_prop(buffer, offs, "debug_prop",

				      dev->node_props.debug_prop);

		sysfs_show_32bit_prop(buffer, offs, "sdma_fw_version",
@@ -1981,6 +1983,9 @@ static void kfd_topology_set_capabilities(struct kfd_topology_device *dev) 
	if (kfd_dbg_has_ttmps_always_setup(dev->gpu))

		dev->node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID;



	if (dev->gpu->adev->sdma.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE)

		dev->node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED;



	if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0)) {

		if (KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 3) ||

		    KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 4))

drivers/gpu/drm/amd/amdkfd/kfd_topology.h

+1 −0
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ struct kfd_node_properties { 
	uint32_t cpu_core_id_base;

	uint32_t simd_id_base;

	uint32_t capability;

	uint32_t capability2;

	uint64_t debug_prop;

	uint32_t max_waves_per_simd;

	uint32_t lds_size_in_kb;

include/uapi/linux/kfd_sysfs.h

+3 −0
Original line number Diff line number Diff line
@@ -63,6 +63,9 @@ 
#define HSA_CAP_PER_QUEUE_RESET_SUPPORTED			0x80000000

#define HSA_CAP_RESERVED					0x000f8000



#define HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED			0x00000001

#define HSA_CAP2_RESERVED					0xfffffffe



/* debug_prop bits in node properties */

#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK     0x0000000f

#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_SHIFT    0