Commit cff3e7c6 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'net-stmmac-rk-second-chunk-of-cleanups' 

Russell King says:

====================
net: stmmac: rk: second chunk of cleanups

This series is a cut-down installment of the dwmac-rk cleanups, covering
up to the point that the AI review had its first issue with the patches.
Unfortunately, this means that we introduce ->init but do not add any
users for it yet. That will be in the next round once this has got
through AI review and merged.
====================

Link: https://patch.msgid.link/aXnrzIbZN-gaZTia@shell.armlinux.org.uk


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 0e4d7df2 1639ba67

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

+57 −63
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ struct rk_reg_speed_data { 
};



struct rk_gmac_ops {

	int (*init)(struct rk_priv_data *bsp_priv);

	void (*set_to_rgmii)(struct rk_priv_data *bsp_priv,

			     int tx_delay, int rx_delay);

	void (*set_to_rmii)(struct rk_priv_data *bsp_priv);
@@ -91,6 +92,10 @@ struct rk_priv_data { 
	struct regmap *php_grf;

};



#define GMAC_CLK_DIV1_125M		0

#define GMAC_CLK_DIV50_2_5M		2

#define GMAC_CLK_DIV5_25M		3



static int rk_set_reg_speed(struct rk_priv_data *bsp_priv,

			    const struct rk_reg_speed_data *rsd,

			    unsigned int reg, phy_interface_t interface,
@@ -299,9 +304,7 @@ static const struct rk_gmac_ops px30_ops = { 
#define RK3128_GMAC_SPEED_100M         GRF_BIT(10)

#define RK3128_GMAC_RMII_CLK_25M       GRF_BIT(11)

#define RK3128_GMAC_RMII_CLK_2_5M      GRF_CLR_BIT(11)

#define RK3128_GMAC_CLK_125M           GRF_FIELD_CONST(13, 12, 0)

#define RK3128_GMAC_CLK_25M            GRF_FIELD_CONST(13, 12, 3)

#define RK3128_GMAC_CLK_2_5M           GRF_FIELD_CONST(13, 12, 2)

#define RK3128_GMAC_CLK(val)           GRF_FIELD_CONST(13, 12, val)

#define RK3128_GMAC_RMII_MODE          GRF_BIT(14)

#define RK3128_GMAC_RMII_MODE_CLR      GRF_CLR_BIT(14)
@@ -325,9 +328,9 @@ static void rk3128_set_to_rmii(struct rk_priv_data *bsp_priv) 
}



static const struct rk_reg_speed_data rk3128_reg_speed_data = {

	.rgmii_10 = RK3128_GMAC_CLK_2_5M,

	.rgmii_100 = RK3128_GMAC_CLK_25M,

	.rgmii_1000 = RK3128_GMAC_CLK_125M,

	.rgmii_10 = RK3128_GMAC_CLK(GMAC_CLK_DIV50_2_5M),

	.rgmii_100 = RK3128_GMAC_CLK(GMAC_CLK_DIV5_25M),

	.rgmii_1000 = RK3128_GMAC_CLK(GMAC_CLK_DIV1_125M),

	.rmii_10 = RK3128_GMAC_RMII_CLK_2_5M | RK3128_GMAC_SPEED_10M,

	.rmii_100 = RK3128_GMAC_RMII_CLK_25M | RK3128_GMAC_SPEED_100M,

};
@@ -362,9 +365,7 @@ static const struct rk_gmac_ops rk3128_ops = { 
#define RK3228_GMAC_SPEED_100M		GRF_BIT(2)

#define RK3228_GMAC_RMII_CLK_25M	GRF_BIT(7)

#define RK3228_GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(7)

#define RK3228_GMAC_CLK_125M		GRF_FIELD_CONST(9, 8, 0)

#define RK3228_GMAC_CLK_25M		GRF_FIELD_CONST(9, 8, 3)

#define RK3228_GMAC_CLK_2_5M		GRF_FIELD_CONST(9, 8, 2)

#define RK3228_GMAC_CLK(val)		GRF_FIELD_CONST(9, 8, val)

#define RK3228_GMAC_RMII_MODE		GRF_BIT(10)

#define RK3228_GMAC_RMII_MODE_CLR	GRF_CLR_BIT(10)

#define RK3228_GMAC_TXCLK_DLY_ENABLE	GRF_BIT(0)
@@ -399,9 +400,9 @@ static void rk3228_set_to_rmii(struct rk_priv_data *bsp_priv) 
}



static const struct rk_reg_speed_data rk3228_reg_speed_data = {

	.rgmii_10 = RK3228_GMAC_CLK_2_5M,

	.rgmii_100 = RK3228_GMAC_CLK_25M,

	.rgmii_1000 = RK3228_GMAC_CLK_125M,

	.rgmii_10 = RK3228_GMAC_CLK(GMAC_CLK_DIV50_2_5M),

	.rgmii_100 = RK3228_GMAC_CLK(GMAC_CLK_DIV5_25M),

	.rgmii_1000 = RK3228_GMAC_CLK(GMAC_CLK_DIV1_125M),

	.rmii_10 = RK3228_GMAC_RMII_CLK_2_5M | RK3228_GMAC_SPEED_10M,

	.rmii_100 = RK3228_GMAC_RMII_CLK_25M | RK3228_GMAC_SPEED_100M,

};
@@ -440,9 +441,7 @@ static const struct rk_gmac_ops rk3228_ops = { 
#define RK3288_GMAC_SPEED_100M		GRF_BIT(10)

#define RK3288_GMAC_RMII_CLK_25M	GRF_BIT(11)

#define RK3288_GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(11)

#define RK3288_GMAC_CLK_125M		GRF_FIELD_CONST(13, 12, 0)

#define RK3288_GMAC_CLK_25M		GRF_FIELD_CONST(13, 12, 3)

#define RK3288_GMAC_CLK_2_5M		GRF_FIELD_CONST(13, 12, 2)

#define RK3288_GMAC_CLK(val)		GRF_FIELD_CONST(13, 12, val)

#define RK3288_GMAC_RMII_MODE		GRF_BIT(14)

#define RK3288_GMAC_RMII_MODE_CLR	GRF_CLR_BIT(14)
@@ -474,9 +473,9 @@ static void rk3288_set_to_rmii(struct rk_priv_data *bsp_priv) 
}



static const struct rk_reg_speed_data rk3288_reg_speed_data = {

	.rgmii_10 = RK3288_GMAC_CLK_2_5M,

	.rgmii_100 = RK3288_GMAC_CLK_25M,

	.rgmii_1000 = RK3288_GMAC_CLK_125M,

	.rgmii_10 = RK3288_GMAC_CLK(GMAC_CLK_DIV50_2_5M),

	.rgmii_100 = RK3288_GMAC_CLK(GMAC_CLK_DIV5_25M),

	.rgmii_1000 = RK3288_GMAC_CLK(GMAC_CLK_DIV1_125M),

	.rmii_10 = RK3288_GMAC_RMII_CLK_2_5M | RK3288_GMAC_SPEED_10M,

	.rmii_100 = RK3288_GMAC_RMII_CLK_25M | RK3288_GMAC_SPEED_100M,

};
@@ -543,9 +542,7 @@ static const struct rk_gmac_ops rk3308_ops = { 
#define RK3328_GMAC_SPEED_100M		GRF_BIT(2)

#define RK3328_GMAC_RMII_CLK_25M	GRF_BIT(7)

#define RK3328_GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(7)

#define RK3328_GMAC_CLK_125M		GRF_FIELD_CONST(12, 11, 0)

#define RK3328_GMAC_CLK_25M		GRF_FIELD_CONST(12, 11, 3)

#define RK3328_GMAC_CLK_2_5M		GRF_FIELD_CONST(12, 11, 2)

#define RK3328_GMAC_CLK(val)		GRF_FIELD_CONST(12, 11, val)

#define RK3328_GMAC_RMII_MODE		GRF_BIT(9)

#define RK3328_GMAC_RMII_MODE_CLR	GRF_CLR_BIT(9)

#define RK3328_GMAC_TXCLK_DLY_ENABLE	GRF_BIT(0)
@@ -580,9 +577,9 @@ static void rk3328_set_to_rmii(struct rk_priv_data *bsp_priv) 
}



static const struct rk_reg_speed_data rk3328_reg_speed_data = {

	.rgmii_10 = RK3328_GMAC_CLK_2_5M,

	.rgmii_100 = RK3328_GMAC_CLK_25M,

	.rgmii_1000 = RK3328_GMAC_CLK_125M,

	.rgmii_10 = RK3328_GMAC_CLK(GMAC_CLK_DIV50_2_5M),

	.rgmii_100 = RK3328_GMAC_CLK(GMAC_CLK_DIV5_25M),

	.rgmii_1000 = RK3328_GMAC_CLK(GMAC_CLK_DIV1_125M),

	.rmii_10 = RK3328_GMAC_RMII_CLK_2_5M | RK3328_GMAC_SPEED_10M,

	.rmii_100 = RK3328_GMAC_RMII_CLK_25M | RK3328_GMAC_SPEED_100M,

};
@@ -632,9 +629,7 @@ static const struct rk_gmac_ops rk3328_ops = { 
#define RK3366_GMAC_SPEED_100M		GRF_BIT(7)

#define RK3366_GMAC_RMII_CLK_25M	GRF_BIT(3)

#define RK3366_GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(3)

#define RK3366_GMAC_CLK_125M		GRF_FIELD_CONST(5, 4, 0)

#define RK3366_GMAC_CLK_25M		GRF_FIELD_CONST(5, 4, 3)

#define RK3366_GMAC_CLK_2_5M		GRF_FIELD_CONST(5, 4, 2)

#define RK3366_GMAC_CLK(val)		GRF_FIELD_CONST(5, 4, val)

#define RK3366_GMAC_RMII_MODE		GRF_BIT(6)

#define RK3366_GMAC_RMII_MODE_CLR	GRF_CLR_BIT(6)
@@ -666,9 +661,9 @@ static void rk3366_set_to_rmii(struct rk_priv_data *bsp_priv) 
}



static const struct rk_reg_speed_data rk3366_reg_speed_data = {

	.rgmii_10 = RK3366_GMAC_CLK_2_5M,

	.rgmii_100 = RK3366_GMAC_CLK_25M,

	.rgmii_1000 = RK3366_GMAC_CLK_125M,

	.rgmii_10 = RK3366_GMAC_CLK(GMAC_CLK_DIV50_2_5M),

	.rgmii_100 = RK3366_GMAC_CLK(GMAC_CLK_DIV5_25M),

	.rgmii_1000 = RK3366_GMAC_CLK(GMAC_CLK_DIV1_125M),

	.rmii_10 = RK3366_GMAC_RMII_CLK_2_5M | RK3366_GMAC_SPEED_10M,

	.rmii_100 = RK3366_GMAC_RMII_CLK_25M | RK3366_GMAC_SPEED_100M,

};
@@ -697,9 +692,7 @@ static const struct rk_gmac_ops rk3366_ops = { 
#define RK3368_GMAC_SPEED_100M		GRF_BIT(7)

#define RK3368_GMAC_RMII_CLK_25M	GRF_BIT(3)

#define RK3368_GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(3)

#define RK3368_GMAC_CLK_125M		GRF_FIELD_CONST(5, 4, 0)

#define RK3368_GMAC_CLK_25M		GRF_FIELD_CONST(5, 4, 3)

#define RK3368_GMAC_CLK_2_5M		GRF_FIELD_CONST(5, 4, 2)

#define RK3368_GMAC_CLK(val)		GRF_FIELD_CONST(5, 4, val)

#define RK3368_GMAC_RMII_MODE		GRF_BIT(6)

#define RK3368_GMAC_RMII_MODE_CLR	GRF_CLR_BIT(6)
@@ -731,9 +724,9 @@ static void rk3368_set_to_rmii(struct rk_priv_data *bsp_priv) 
}



static const struct rk_reg_speed_data rk3368_reg_speed_data = {

	.rgmii_10 = RK3368_GMAC_CLK_2_5M,

	.rgmii_100 = RK3368_GMAC_CLK_25M,

	.rgmii_1000 = RK3368_GMAC_CLK_125M,

	.rgmii_10 = RK3368_GMAC_CLK(GMAC_CLK_DIV50_2_5M),

	.rgmii_100 = RK3368_GMAC_CLK(GMAC_CLK_DIV5_25M),

	.rgmii_1000 = RK3368_GMAC_CLK(GMAC_CLK_DIV1_125M),

	.rmii_10 = RK3368_GMAC_RMII_CLK_2_5M | RK3368_GMAC_SPEED_10M,

	.rmii_100 = RK3368_GMAC_RMII_CLK_25M | RK3368_GMAC_SPEED_100M,

};
@@ -762,9 +755,7 @@ static const struct rk_gmac_ops rk3368_ops = { 
#define RK3399_GMAC_SPEED_100M		GRF_BIT(7)

#define RK3399_GMAC_RMII_CLK_25M	GRF_BIT(3)

#define RK3399_GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(3)

#define RK3399_GMAC_CLK_125M		GRF_FIELD_CONST(5, 4, 0)

#define RK3399_GMAC_CLK_25M		GRF_FIELD_CONST(5, 4, 3)

#define RK3399_GMAC_CLK_2_5M		GRF_FIELD_CONST(5, 4, 2)

#define RK3399_GMAC_CLK(val)		GRF_FIELD_CONST(5, 4, val)

#define RK3399_GMAC_RMII_MODE		GRF_BIT(6)

#define RK3399_GMAC_RMII_MODE_CLR	GRF_CLR_BIT(6)
@@ -796,9 +787,9 @@ static void rk3399_set_to_rmii(struct rk_priv_data *bsp_priv) 
}



static const struct rk_reg_speed_data rk3399_reg_speed_data = {

	.rgmii_10 = RK3399_GMAC_CLK_2_5M,

	.rgmii_100 = RK3399_GMAC_CLK_25M,

	.rgmii_1000 = RK3399_GMAC_CLK_125M,

	.rgmii_10 = RK3399_GMAC_CLK(GMAC_CLK_DIV50_2_5M),

	.rgmii_100 = RK3399_GMAC_CLK(GMAC_CLK_DIV5_25M),

	.rgmii_1000 = RK3399_GMAC_CLK(GMAC_CLK_DIV1_125M),

	.rmii_10 = RK3399_GMAC_RMII_CLK_2_5M | RK3399_GMAC_SPEED_10M,

	.rmii_100 = RK3399_GMAC_RMII_CLK_25M | RK3399_GMAC_SPEED_100M,

};
@@ -905,9 +896,7 @@ static const struct rk_gmac_ops rk3506_ops = { 
#define RK3528_GMAC1_CLK_RMII_DIV2	GRF_BIT(10)

#define RK3528_GMAC1_CLK_RMII_DIV20	GRF_CLR_BIT(10)



#define RK3528_GMAC1_CLK_RGMII_DIV1	GRF_FIELD_CONST(11, 10, 0)

#define RK3528_GMAC1_CLK_RGMII_DIV5	GRF_FIELD_CONST(11, 10, 3)

#define RK3528_GMAC1_CLK_RGMII_DIV50	GRF_FIELD_CONST(11, 10, 2)

#define RK3528_GMAC1_CLK_RGMII(val)	GRF_FIELD_CONST(11, 10, val)



#define RK3528_GMAC0_CLK_RMII_GATE	GRF_BIT(2)

#define RK3528_GMAC0_CLK_RMII_NOGATE	GRF_CLR_BIT(2)
@@ -945,9 +934,9 @@ static const struct rk_reg_speed_data rk3528_gmac0_reg_speed_data = { 
};



static const struct rk_reg_speed_data rk3528_gmac1_reg_speed_data = {

	.rgmii_10 = RK3528_GMAC1_CLK_RGMII_DIV50,

	.rgmii_100 = RK3528_GMAC1_CLK_RGMII_DIV5,

	.rgmii_1000 = RK3528_GMAC1_CLK_RGMII_DIV1,

	.rgmii_10 = RK3528_GMAC1_CLK_RGMII(GMAC_CLK_DIV50_2_5M),

	.rgmii_100 = RK3528_GMAC1_CLK_RGMII(GMAC_CLK_DIV5_25M),

	.rgmii_1000 = RK3528_GMAC1_CLK_RGMII(GMAC_CLK_DIV1_125M),

	.rmii_10 = RK3528_GMAC1_CLK_RMII_DIV20,

	.rmii_100 = RK3528_GMAC1_CLK_RMII_DIV2,

};
@@ -1099,9 +1088,7 @@ static const struct rk_gmac_ops rk3568_ops = { 
#define RK3576_GMAC_CLK_RMII_DIV2		GRF_BIT(5)

#define RK3576_GMAC_CLK_RMII_DIV20		GRF_CLR_BIT(5)



#define RK3576_GMAC_CLK_RGMII_DIV1		GRF_FIELD_CONST(6, 5, 0)

#define RK3576_GMAC_CLK_RGMII_DIV5		GRF_FIELD_CONST(6, 5, 3)

#define RK3576_GMAC_CLK_RGMII_DIV50		GRF_FIELD_CONST(6, 5, 2)

#define RK3576_GMAC_CLK_RGMII(val)		GRF_FIELD_CONST(6, 5, val)



#define RK3576_GMAC_CLK_RMII_GATE		GRF_BIT(4)

#define RK3576_GMAC_CLK_RMII_NOGATE		GRF_CLR_BIT(4)
@@ -1145,9 +1132,9 @@ static void rk3576_set_to_rmii(struct rk_priv_data *bsp_priv) 
}



static const struct rk_reg_speed_data rk3578_reg_speed_data = {

	.rgmii_10 = RK3576_GMAC_CLK_RGMII_DIV50,

	.rgmii_100 = RK3576_GMAC_CLK_RGMII_DIV5,

	.rgmii_1000 = RK3576_GMAC_CLK_RGMII_DIV1,

	.rgmii_10 = RK3576_GMAC_CLK_RGMII(GMAC_CLK_DIV50_2_5M),

	.rgmii_100 = RK3576_GMAC_CLK_RGMII(GMAC_CLK_DIV5_25M),

	.rgmii_1000 = RK3576_GMAC_CLK_RGMII(GMAC_CLK_DIV1_125M),

	.rmii_10 = RK3576_GMAC_CLK_RMII_DIV20,

	.rmii_100 = RK3576_GMAC_CLK_RMII_DIV2,

};
@@ -1223,12 +1210,8 @@ static const struct rk_gmac_ops rk3576_ops = { 
#define RK3588_GMA_CLK_RMII_DIV2(id)		GRF_BIT(5 * (id) + 2)

#define RK3588_GMA_CLK_RMII_DIV20(id)		GRF_CLR_BIT(5 * (id) + 2)



#define RK3588_GMAC_CLK_RGMII_DIV1(id)		\

	(GRF_FIELD_CONST(3, 2, 0) << ((id) * 5))

#define RK3588_GMAC_CLK_RGMII_DIV5(id)		\

	(GRF_FIELD_CONST(3, 2, 3) << ((id) * 5))

#define RK3588_GMAC_CLK_RGMII_DIV50(id)		\

	(GRF_FIELD_CONST(3, 2, 2) << ((id) * 5))

#define RK3588_GMAC_CLK_RGMII(id, val)		\

	(GRF_FIELD_CONST(3, 2, val) << ((id) * 5))



#define RK3588_GMAC_CLK_RMII_GATE(id)		GRF_BIT(5 * (id) + 1)

#define RK3588_GMAC_CLK_RMII_NOGATE(id)		GRF_CLR_BIT(5 * (id) + 1)
@@ -1275,17 +1258,17 @@ static int rk3588_set_gmac_speed(struct rk_priv_data *bsp_priv, 
		if (interface == PHY_INTERFACE_MODE_RMII)

			val = RK3588_GMA_CLK_RMII_DIV20(id);

		else

			val = RK3588_GMAC_CLK_RGMII_DIV50(id);

			val = RK3588_GMAC_CLK_RGMII(id, GMAC_CLK_DIV50_2_5M);

		break;

	case 100:

		if (interface == PHY_INTERFACE_MODE_RMII)

			val = RK3588_GMA_CLK_RMII_DIV2(id);

		else

			val = RK3588_GMAC_CLK_RGMII_DIV5(id);

			val = RK3588_GMAC_CLK_RGMII(id, GMAC_CLK_DIV5_25M);

		break;

	case 1000:

		if (interface != PHY_INTERFACE_MODE_RMII)

			val = RK3588_GMAC_CLK_RGMII_DIV1(id);

			val = RK3588_GMAC_CLK_RGMII(id, GMAC_CLK_DIV1_125M);

		else

			goto err;

		break;
@@ -1636,6 +1619,15 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev, 


	bsp_priv->dev = dev;



	if (ops->init) {

		ret = ops->init(bsp_priv);

		if (ret) {

			reset_control_put(bsp_priv->phy_reset);

			dev_err_probe(dev, ret, "failed to init BSP\n");

			return ERR_PTR(ret);

		}

	}



	return bsp_priv;

}
@@ -1784,6 +1776,8 @@ static void rk_gmac_exit(struct device *dev, void *bsp_priv_) 


	if (priv->plat->phy_node && bsp_priv->integrated_phy)

		clk_put(bsp_priv->clk_phy);



	reset_control_put(bsp_priv->phy_reset);

}



static int rk_gmac_probe(struct platform_device *pdev)