Unverified Commit d1181e34 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'qcom-arm32-for-6.14' of... 

Merge tag 'qcom-arm32-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm Arm32 DeviceTree updates for v6.14

Describe the interconnect paths for PCIe EP controllers on SDX55 and
SDX65. Disable USB U1/U2 entry to improve USB stability on the same.

* tag 'qcom-arm32-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: sdx55: Disable USB U1/U2 entry
  ARM: dts: qcom: sdx65: Disable USB U1/U2 entry
  ARM: dts: qcom: sdx55: Add CPU PCIe EP interconnect path
  ARM: dts: qcom: sdx65: Add PCIe EP interconnect path

Link: https://lore.kernel.org/r/20250111171126.369502-1-andersson@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 29a05220 e3bab40d

arch/arm/boot/dts/qcom/qcom-sdx55.dtsi

+5 −2
Original line number Diff line number Diff line
@@ -427,8 +427,9 @@ pcie_ep: pcie-ep@1c00000 { 
			interrupt-names = "global",

					  "doorbell";



			interconnects = <&system_noc MASTER_PCIE &mc_virt SLAVE_EBI_CH0>;

			interconnect-names = "pcie-mem";

			interconnects = <&system_noc MASTER_PCIE &mc_virt SLAVE_EBI_CH0>,

					<&mem_noc MASTER_AMPSS_M0 &system_noc SLAVE_PCIE_0>;

			interconnect-names = "pcie-mem", "cpu-pcie";



			resets = <&gcc GCC_PCIE_BCR>;

			reset-names = "core";
@@ -613,6 +614,8 @@ usb_dwc3: usb@a600000 { 
				iommus = <&apps_smmu 0x1a0 0x0>;

				snps,dis_u2_susphy_quirk;

				snps,dis_enblslpm_quirk;

				snps,dis-u1-entry-quirk;

				snps,dis-u2-entry-quirk;

				phys = <&usb_hsphy>, <&usb_qmpphy>;

				phy-names = "usb2-phy", "usb3-phy";

			};

arch/arm/boot/dts/qcom/qcom-sdx65.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -335,6 +335,10 @@ pcie_ep: pcie-ep@1c00000 { 
				     <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "global", "doorbell";



			interconnects = <&system_noc MASTER_PCIE_0 &mc_virt SLAVE_EBI1>,

					<&mem_noc MASTER_APPSS_PROC &system_noc SLAVE_PCIE_0>;

			interconnect-names = "pcie-mem", "cpu-pcie";



			resets = <&gcc GCC_PCIE_BCR>;

			reset-names = "core";
@@ -526,6 +530,8 @@ usb_dwc3: usb@a600000 { 
				iommus = <&apps_smmu 0x1a0 0x0>;

				snps,dis_u2_susphy_quirk;

				snps,dis_enblslpm_quirk;

				snps,dis-u1-entry-quirk;

				snps,dis-u2-entry-quirk;

				phys = <&usb_hsphy>, <&usb_qmpphy>;

				phy-names = "usb2-phy", "usb3-phy";

			};