Commit d1352f76 authored by Paolo Abeni's avatar Paolo Abeni
Browse files

Merge branch 'introduce-flowtable-hw-offloading-in-airoha_eth-driver'

Lorenzo Bianconi says:

====================
Introduce flowtable hw offloading in airoha_eth driver

Introduce netfilter flowtable integration in airoha_eth driver to
offload 5-tuple flower rules learned by the PPE module if the user
accelerates them using a nft configuration similar to the one reported
below:

table inet filter {
	flowtable ft {
		hook ingress priority filter
		devices = { lan1, lan2, lan3, lan4, eth1 }
		flags offload;
	}
	chain forward {
		type filter hook forward priority filter; policy accept;
		meta l4proto { tcp, udp } flow add @ft
	}
}

Packet Processor Engine (PPE) module available on EN7581 SoC populates
the PPE table with 5-tuples flower rules learned from traffic forwarded
between the GDM ports connected to the Packet Switch Engine (PSE) module.
airoha_eth driver configures and collects data from the PPE module via a
Network Processor Unit (NPU) RISC-V module available on the EN7581 SoC.
Move airoha_eth driver in a dedicated folder
(drivers/net/ethernet/airoha).

v7: https://lore.kernel.org/r/20250224-airoha-en7581-flowtable-offload-v7-0-b4a22ad8364e@kernel.org
v6: https://lore.kernel.org/r/20250221-airoha-en7581-flowtable-offload-v6-0-d593af0e9487@kernel.org
v5: https://lore.kernel.org/r/20250217-airoha-en7581-flowtable-offload-v5-0-28be901cb735@kernel.org
v4: https://lore.kernel.org/r/20250213-airoha-en7581-flowtable-offload-v4-0-b69ca16d74db@kernel.org
v3: https://lore.kernel.org/r/20250209-airoha-en7581-flowtable-offload-v3-0-dba60e755563@kernel.org
v2: https://lore.kernel.org/r/20250207-airoha-en7581-flowtable-offload-v2-0-3a2239692a67@kernel.org
v1: https://lore.kernel.org/r/20250205-airoha-en7581-flowtable-offload-v1-0-d362cfa97b01@kernel.org
====================

Link: https://patch.msgid.link/20250228-airoha-en7581-flowtable-offload-v8-0-01dc1653f46e@kernel.org


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parents 265e352b 3fe15c64
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+10 −0
Original line number Diff line number Diff line
@@ -63,6 +63,14 @@ properties:
  "#size-cells":
    const: 0

  airoha,npu:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to the node used to configure the NPU module.
      The Airoha Network Processor Unit (NPU) provides a configuration
      interface to implement hardware flow offloading programming Packet
      Processor Engine (PPE) flow table.

patternProperties:
  "^ethernet@[1-4]$":
    type: object
@@ -132,6 +140,8 @@ examples:
                     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;

        airoha,npu = <&npu>;

        #address-cells = <1>;
        #size-cells = <0>;

+84 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/airoha,en7581-npu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Airoha Network Processor Unit for EN7581 SoC

maintainers:
  - Lorenzo Bianconi <lorenzo@kernel.org>

description:
  The Airoha Network Processor Unit (NPU) provides a configuration interface
  to implement wired and wireless hardware flow offloading programming Packet
  Processor Engine (PPE) flow table.

properties:
  compatible:
    enum:
      - airoha,en7581-npu

  reg:
    maxItems: 1

  interrupts:
    items:
      - description: mbox host irq line
      - description: watchdog0 irq line
      - description: watchdog1 irq line
      - description: watchdog2 irq line
      - description: watchdog3 irq line
      - description: watchdog4 irq line
      - description: watchdog5 irq line
      - description: watchdog6 irq line
      - description: watchdog7 irq line
      - description: wlan irq line0
      - description: wlan irq line1
      - description: wlan irq line2
      - description: wlan irq line3
      - description: wlan irq line4
      - description: wlan irq line5

  memory-region:
    maxItems: 1
    description:
      Memory used to store NPU firmware binary.

required:
  - compatible
  - reg
  - interrupts
  - memory-region

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    soc {
      #address-cells = <2>;
      #size-cells = <2>;

      npu@1e900000 {
        compatible = "airoha,en7581-npu";
        reg = <0 0x1e900000 0 0x313000>;
        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
        memory-region = <&npu_binary>;
      };
    };
+5 −0
Original line number Diff line number Diff line
@@ -2586,6 +2586,11 @@ mt7531_setup_common(struct dsa_switch *ds)
	/* Allow mirroring frames received on the local port (monitor port). */
	mt7530_set(priv, MT753X_AGC, LOCAL_EN);

	/* Enable Special Tag for rx frames */
	if (priv->id == ID_EN7581)
		mt7530_write(priv, MT753X_CPORT_SPTAG_CFG,
			     CPORT_SW2FE_STAG_EN | CPORT_FE2SW_STAG_EN);

	/* Flush the FDB table */
	ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL);
	if (ret < 0)
+4 −0
Original line number Diff line number Diff line
@@ -627,6 +627,10 @@ enum mt7531_xtal_fsel {
#define  MT7531_GPIO12_RG_RXD3_MASK	GENMASK(19, 16)
#define  MT7531_EXT_P_MDIO_12		(2 << 16)

#define MT753X_CPORT_SPTAG_CFG		0x7c10
#define  CPORT_SW2FE_STAG_EN		BIT(1)
#define  CPORT_FE2SW_STAG_EN		BIT(0)

/* Registers for LED GPIO control (MT7530 only)
 * All registers follow this pattern:
 * [ 2: 0]  port 0
+2 −0
Original line number Diff line number Diff line
@@ -20,6 +20,8 @@ source "drivers/net/ethernet/actions/Kconfig"
source "drivers/net/ethernet/adaptec/Kconfig"
source "drivers/net/ethernet/aeroflex/Kconfig"
source "drivers/net/ethernet/agere/Kconfig"
source "drivers/net/ethernet/airoha/Kconfig"
source "drivers/net/ethernet/mellanox/Kconfig"
source "drivers/net/ethernet/alacritech/Kconfig"
source "drivers/net/ethernet/allwinner/Kconfig"
source "drivers/net/ethernet/alteon/Kconfig"
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