Commit d17468c6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-6.8-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Palmer Dabbelt:

 - detect ".option arch" support on not-yet-released LLVM builds

 - fix missing TLB flush when modifying non-leaf PTEs

 - fixes for T-Head custom extensions

 - fix for systems with the legacy PMU, that manifests as a crash on
   kernels built without SBI PMU support

 - fix for systems that clear *envcfg on suspend, which manifests as
   cbo.zero trapping after resume

 - fixes for Svnapot systems, including removing Svnapot support for
   huge vmalloc/vmap regions

* tag 'riscv-for-linus-6.8-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Sparse-Memory/vmemmap out-of-bounds fix
  riscv: Fix pte_leaf_size() for NAPOT
  Revert "riscv: mm: support Svnapot in huge vmap"
  riscv: Save/restore envcfg CSR during CPU suspend
  riscv: Add a custom ISA extension for the [ms]envcfg CSR
  riscv: Fix enabling cbo.zero when running in M-mode
  perf: RISCV: Fix panic on pmu overflow handler
  MAINTAINERS: Update SiFive driver maintainers
  drivers: perf: ctr_get_width function for legacy is not defined
  drivers: perf: added capabilities for legacy PMU
  RISC-V: Ignore V from the riscv,isa DT property on older T-Head CPUs
  riscv: Fix build error if !CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION
  riscv: mm: fix NOCACHE_THEAD does not set bit[61] correctly
  riscv: add CALLER_ADDRx support
  RISC-V: Drop invalid test from CONFIG_AS_HAS_OPTION_ARCH
  kbuild: Add -Wa,--fatal-warnings to as-instr invocation
  riscv: tlb: fix __p*d_free_tlb()
parents 5870ba3d a11dd49d
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+5 −24
Original line number Diff line number Diff line
@@ -1395,6 +1395,7 @@ F: drivers/hwmon/max31760.c
ANALOGBITS PLL LIBRARIES
M:	Paul Walmsley <paul.walmsley@sifive.com>
M:	Samuel Holland <samuel.holland@sifive.com>
S:	Supported
F:	drivers/clk/analogbits/*
F:	include/linux/clk/analogbits*
@@ -16743,6 +16744,7 @@ F: drivers/pci/controller/dwc/*layerscape*
PCI DRIVER FOR FU740
M:	Paul Walmsley <paul.walmsley@sifive.com>
M:	Greentime Hu <greentime.hu@sifive.com>
M:	Samuel Holland <samuel.holland@sifive.com>
L:	linux-pci@vger.kernel.org
S:	Maintained
F:	Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml
@@ -19988,36 +19990,15 @@ S: Maintained
F:	drivers/watchdog/simatic-ipc-wdt.c
SIFIVE DRIVERS
M:	Palmer Dabbelt <palmer@dabbelt.com>
M:	Paul Walmsley <paul.walmsley@sifive.com>
M:	Samuel Holland <samuel.holland@sifive.com>
L:	linux-riscv@lists.infradead.org
S:	Supported
F:	drivers/dma/sf-pdma/
N:	sifive
K:	fu[57]40
K:	[^@]sifive
SIFIVE CACHE DRIVER
M:	Conor Dooley <conor@kernel.org>
L:	linux-riscv@lists.infradead.org
S:	Maintained
F:	Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
F:	drivers/cache/sifive_ccache.c
SIFIVE FU540 SYSTEM-ON-CHIP
M:	Paul Walmsley <paul.walmsley@sifive.com>
M:	Palmer Dabbelt <palmer@dabbelt.com>
L:	linux-riscv@lists.infradead.org
S:	Supported
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/pjw/sifive.git
N:	fu540
K:	fu540
SIFIVE PDMA DRIVER
M:	Green Wan <green.wan@sifive.com>
S:	Maintained
F:	Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
F:	drivers/dma/sf-pdma/
SILEAD TOUCHSCREEN DRIVER
M:	Hans de Goede <hdegoede@redhat.com>
L:	linux-input@vger.kernel.org
+0 −1
Original line number Diff line number Diff line
@@ -315,7 +315,6 @@ config AS_HAS_OPTION_ARCH
	# https://reviews.llvm.org/D123515
	def_bool y
	depends on $(as-instr, .option arch$(comma) +m)
	depends on !$(as-instr, .option arch$(comma) -i)

source "arch/riscv/Kconfig.socs"
source "arch/riscv/Kconfig.errata"
+2 −0
Original line number Diff line number Diff line
@@ -424,6 +424,7 @@
# define CSR_STATUS	CSR_MSTATUS
# define CSR_IE		CSR_MIE
# define CSR_TVEC	CSR_MTVEC
# define CSR_ENVCFG	CSR_MENVCFG
# define CSR_SCRATCH	CSR_MSCRATCH
# define CSR_EPC	CSR_MEPC
# define CSR_CAUSE	CSR_MCAUSE
@@ -448,6 +449,7 @@
# define CSR_STATUS	CSR_SSTATUS
# define CSR_IE		CSR_SIE
# define CSR_TVEC	CSR_STVEC
# define CSR_ENVCFG	CSR_SENVCFG
# define CSR_SCRATCH	CSR_SSCRATCH
# define CSR_EPC	CSR_SEPC
# define CSR_CAUSE	CSR_SCAUSE
+5 −0
Original line number Diff line number Diff line
@@ -25,6 +25,11 @@

#define ARCH_SUPPORTS_FTRACE_OPS 1
#ifndef __ASSEMBLY__

extern void *return_address(unsigned int level);

#define ftrace_return_address(n) return_address(n)

void MCOUNT_NAME(void);
static inline unsigned long ftrace_call_adjust(unsigned long addr)
{
+2 −0
Original line number Diff line number Diff line
@@ -11,8 +11,10 @@ static inline void arch_clear_hugepage_flags(struct page *page)
}
#define arch_clear_hugepage_flags arch_clear_hugepage_flags

#ifdef CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION
bool arch_hugetlb_migration_supported(struct hstate *h);
#define arch_hugetlb_migration_supported arch_hugetlb_migration_supported
#endif

#ifdef CONFIG_RISCV_ISA_SVNAPOT
#define __HAVE_ARCH_HUGE_PTE_CLEAR
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