Commit d1f6be54 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge tag 'cpufreq-arm-updates-6.7-part2' of... 

Merge tag 'cpufreq-arm-updates-6.7-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm

Merge ARM cpufreq updates for 6.7 (part 2) from Viresh kumar:

"- Add support for several Qualcomm SoC versions (Robert Marko and
   Varadarajan Narayanan)."

* tag 'cpufreq-arm-updates-6.7-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
  cpufreq: qcom-nvmem: Introduce cpufreq for ipq95xx
  cpufreq: qcom-nvmem: Enable cpufreq for ipq53xx
  cpufreq: qcom-nvmem: add support for IPQ8074
  soc: qcom: socinfo: Add IDs for IPQ8174 family
  dt-bindings: arm: qcom,ids: Add IDs for IPQ8174 family
  dt-bindings: qcom: geni-se: Allow dma-coherent
  soc: qcom: socinfo: Add SoC ID for QCM6490
  dt-bindings: arm: qcom,ids: Add SoC ID for QCM6490
  soc: qcom: socinfo: Add SM8550-adjacent PMICs
  soc: qcom: wcnss_ctrl: Remove redundant initialization owner in wcnss_ctrl_driver
  soc: qcom: socinfo: Add Soc ID for SM7150P
  dt-bindings: arm: qcom,ids: Add Soc ID for SM7150P
  firmware: Add support for Qualcomm UEFI Secure Application
  firmware: qcom_scm: Add support for Qualcomm Secure Execution Environment SCM interface
  lib/ucs2_string: Add UCS-2 strscpy function
parents ad1871ad 5b5b5806

Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml

+2 −0
Original line number Diff line number Diff line
@@ -52,6 +52,8 @@ properties: 
  iommus:

    maxItems: 1



  dma-coherent: true



required:

  - compatible

  - reg

MAINTAINERS

+12 −0
Original line number Diff line number Diff line
@@ -17844,6 +17844,18 @@ S: Maintained 
F:	Documentation/devicetree/bindings/mtd/qcom,nandc.yaml

F:	drivers/mtd/nand/raw/qcom_nandc.c









QUALCOMM QSEECOM DRIVER









M:	Maximilian Luz <luzmaximilian@gmail.com>









L:	linux-arm-msm@vger.kernel.org









S:	Maintained









F:	drivers/firmware/qcom_qseecom.c

















QUALCOMM QSEECOM UEFISECAPP DRIVER









M:	Maximilian Luz <luzmaximilian@gmail.com>









L:	linux-arm-msm@vger.kernel.org









S:	Maintained









F:	drivers/firmware/qcom_qseecom_uefisecapp.c

















QUALCOMM RMNET DRIVER









M:	Subash Abhinov Kasiviswanathan <quic_subashab@quicinc.com>









M:	Sean Tranchetti <quic_stranche@quicinc.com>

























drivers/cpufreq/cpufreq-dt-platdev.c



+3
−0






























Original line number
Diff line number
Diff line







@@ -180,8 +180,11 @@ static const struct of_device_id blocklist[] __initconst = {







	{ .compatible = "ti,am62a7", },









	{ .compatible = "ti,am62p5", },



















	{ .compatible = "qcom,ipq5332", },









	{ .compatible = "qcom,ipq6018", },









	{ .compatible = "qcom,ipq8064", },









	{ .compatible = "qcom,ipq8074", },









	{ .compatible = "qcom,ipq9574", },









	{ .compatible = "qcom,apq8064", },









	{ .compatible = "qcom,msm8974", },









	{ .compatible = "qcom,msm8960", },
































drivers/cpufreq/qcom-cpufreq-nvmem.c



+60
−0






























Original line number
Diff line number
Diff line







@@ -38,6 +38,11 @@ enum ipq806x_versions {

















#define IPQ6000_VERSION	BIT(2)



















enum ipq8074_versions {









	IPQ8074_HAWKEYE_VERSION = 0,









	IPQ8074_ACORN_VERSION,









};



















struct qcom_cpufreq_drv;



















struct qcom_cpufreq_match_data {








@@ -178,6 +183,16 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,







	switch (msm_id) {









	case QCOM_ID_MSM8996:









	case QCOM_ID_APQ8096:









	case QCOM_ID_IPQ5332:









	case QCOM_ID_IPQ5322:









	case QCOM_ID_IPQ5312:









	case QCOM_ID_IPQ5302:









	case QCOM_ID_IPQ5300:









	case QCOM_ID_IPQ9514:









	case QCOM_ID_IPQ9550:









	case QCOM_ID_IPQ9554:









	case QCOM_ID_IPQ9570:









	case QCOM_ID_IPQ9574:









		drv->versions = 1 << (unsigned int)(*speedbin);









		break;









	case QCOM_ID_MSM8996SG:








@@ -338,6 +353,44 @@ static int qcom_cpufreq_ipq6018_name_version(struct device *cpu_dev,







	return 0;









}



















static int qcom_cpufreq_ipq8074_name_version(struct device *cpu_dev,









					     struct nvmem_cell *speedbin_nvmem,









					     char **pvs_name,









					     struct qcom_cpufreq_drv *drv)









{









	u32 msm_id;









	int ret;









	*pvs_name = NULL;



















	ret = qcom_smem_get_soc_id(&msm_id);









	if (ret)









		return ret;



















	switch (msm_id) {









	case QCOM_ID_IPQ8070A:









	case QCOM_ID_IPQ8071A:









	case QCOM_ID_IPQ8172:









	case QCOM_ID_IPQ8173:









	case QCOM_ID_IPQ8174:









		drv->versions = BIT(IPQ8074_ACORN_VERSION);









		break;









	case QCOM_ID_IPQ8072A:









	case QCOM_ID_IPQ8074A:









	case QCOM_ID_IPQ8076A:









	case QCOM_ID_IPQ8078A:









		drv->versions = BIT(IPQ8074_HAWKEYE_VERSION);









		break;









	default:









		dev_err(cpu_dev,









			"SoC ID %u is not part of IPQ8074 family, limiting to 1.4GHz!\n",









			msm_id);









		drv->versions = BIT(IPQ8074_ACORN_VERSION);









		break;









	}



















	return 0;









}



















static const char *generic_genpd_names[] = { "perf", NULL };



















static const struct qcom_cpufreq_match_data match_data_kryo = {








@@ -367,6 +420,10 @@ static const struct qcom_cpufreq_match_data match_data_ipq8064 = {







	.get_version = qcom_cpufreq_ipq8064_name_version,









};



















static const struct qcom_cpufreq_match_data match_data_ipq8074 = {









	.get_version = qcom_cpufreq_ipq8074_name_version,









};



















static int qcom_cpufreq_probe(struct platform_device *pdev)









{









	struct qcom_cpufreq_drv *drv;








@@ -494,9 +551,12 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {







	{ .compatible = "qcom,msm8909", .data = &match_data_msm8909 },









	{ .compatible = "qcom,msm8996", .data = &match_data_kryo },









	{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },









	{ .compatible = "qcom,ipq5332", .data = &match_data_kryo },









	{ .compatible = "qcom,ipq6018", .data = &match_data_ipq6018 },









	{ .compatible = "qcom,ipq8064", .data = &match_data_ipq8064 },









	{ .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 },









	{ .compatible = "qcom,apq8064", .data = &match_data_krait },









	{ .compatible = "qcom,ipq9574", .data = &match_data_kryo },









	{ .compatible = "qcom,msm8974", .data = &match_data_krait },









	{ .compatible = "qcom,msm8960", .data = &match_data_krait },









	{},
































drivers/firmware/Kconfig



+32
−0






























Original line number
Diff line number
Diff line







@@ -226,6 +226,38 @@ config QCOM_SCM_DOWNLOAD_MODE_DEFAULT

















	  Say Y here to enable "download mode" by default.



















config QCOM_QSEECOM









	bool "Qualcomm QSEECOM interface driver"









	depends on QCOM_SCM=y









	help









	  Various Qualcomm SoCs have a Secure Execution Environment (SEE) running









	  in the Trust Zone. This module provides an interface to that via the









	  QSEECOM mechanism, using SCM calls.



















	  The QSEECOM interface allows, among other things, access to applications









	  running in the SEE. An example of such an application is 'uefisecapp',









	  which is required to access UEFI variables on certain systems. If









	  selected, the interface will also attempt to detect and register client









	  devices for supported applications.



















	  Select Y here to enable the QSEECOM interface driver.



















config QCOM_QSEECOM_UEFISECAPP









	bool "Qualcomm SEE UEFI Secure App client driver"









	depends on QCOM_QSEECOM









	depends on EFI









	help









	  Various Qualcomm SoCs do not allow direct access to EFI variables.









	  Instead, these need to be accessed via the UEFI Secure Application









	  (uefisecapp), residing in the Secure Execution Environment (SEE).



















	  This module provides a client driver for uefisecapp, installing efivar









	  operations to allow the kernel accessing EFI variables, and via that also









	  provide user-space with access to EFI variables via efivarfs.



















	  Select Y here to provide access to EFI variables on the aforementioned









	  platforms.



















config SYSFB









	bool









	select BOOT_VESA_SUPPORT