Commit d2721bb1 authored by Anup Patel's avatar Anup Patel Committed by Paul Walmsley
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RISC-V: Don't print details of CPUs disabled in DT 



Early boot stages may disable CPU DT nodes for unavailable
CPUs based on SKU, pinstraps, eFuse, etc. Currently, the
riscv_early_of_processor_hartid() prints details of a CPU
if it is disabled in DT which has no value and gives a
false impression to the users that there some issue with
the CPU.

Fixes: e3d794d5 ("riscv: treat cpu devicetree nodes without status as enabled")
Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20251014163009.182381-1-apatel@ventanamicro.com


Signed-off-by: default avatarPaul Walmsley <pjw@kernel.org>
parent 768e054d

arch/riscv/kernel/cpu.c

+1 −3
Original line number Diff line number Diff line
@@ -62,10 +62,8 @@ int __init riscv_early_of_processor_hartid(struct device_node *node, unsigned lo 
		return -ENODEV;

	}



	if (!of_device_is_available(node)) {

		pr_info("CPU with hartid=%lu is not available\n", *hart);

	if (!of_device_is_available(node))

		return -ENODEV;

	}



	if (of_property_read_string(node, "riscv,isa-base", &isa))

		goto old_interface;