Commit d342df11 authored by Jacky Bai's avatar Jacky Bai Committed by Abel Vesa
Browse files

clk: imx: composite-93: keep root clock on when mcore enabled 



Previously we assumed that the root clock slice is enabled
by default when kernel boot up. But the bootloader may disable
the clocks before jump into kernel. The gate ops should be registered
rather than NULL to make sure the disabled clock can be enabled
when kernel boot up.  Refine the code to skip disable the clock
if mcore booted.

Fixes: a740d735 ("clk: imx: imx93: add mcore_booted module paratemter")
Signed-off-by: default avatarJacky Bai <ping.bai@nxp.com>
Reviewed-by: default avatarPeng Fan <peng.fan@nxp.com>
Tested-by: default avatarChancel Liu <chancel.liu@nxp.com>
Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Reviewed-by: default avatarAbel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240607133347.3291040-3-peng.fan@oss.nxp.com


Signed-off-by: default avatarAbel Vesa <abel.vesa@linaro.org>
parent 8f32e9dd

drivers/clk/imx/clk-composite-93.c

+8 −7
Original line number Diff line number Diff line
@@ -76,6 +76,13 @@ static int imx93_clk_composite_gate_enable(struct clk_hw *hw) 


static void imx93_clk_composite_gate_disable(struct clk_hw *hw)

{

	/*

	 * Skip disable the root clock gate if mcore enabled.

	 * The root clock may be used by the mcore.

	 */

	if (mcore_booted)

		return;



	imx93_clk_composite_gate_endisable(hw, 0);

}
@@ -222,7 +229,7 @@ struct clk_hw *imx93_clk_composite_flags(const char *name, const char * const *p 
		hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,

					       mux_hw, &clk_mux_ro_ops, div_hw,

					       &clk_divider_ro_ops, NULL, NULL, flags);

	} else if (!mcore_booted) {

	} else {

		gate = kzalloc(sizeof(*gate), GFP_KERNEL);

		if (!gate)

			goto fail;
@@ -238,12 +245,6 @@ struct clk_hw *imx93_clk_composite_flags(const char *name, const char * const *p 
					       &imx93_clk_composite_divider_ops, gate_hw,

					       &imx93_clk_composite_gate_ops,

					       flags | CLK_SET_RATE_NO_REPARENT);

	} else {

		hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,

					       mux_hw, &imx93_clk_composite_mux_ops, div_hw,

					       &imx93_clk_composite_divider_ops, NULL,

					       &imx93_clk_composite_gate_ops,

					       flags | CLK_SET_RATE_NO_REPARENT);

	}



	if (IS_ERR(hw))