Commit d3c43855 authored by Mohammad Rafi Shaik's avatar Mohammad Rafi Shaik Committed by Bjorn Andersson
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arm64: dts: qcom: qcs6490-audioreach: Enable LPASS macros clock settings for audioreach 



Enable LPASS macros (WSA, VA, RX, TX) and the lpass_tlmm clock required
for audioreach functionality. In audioreach solution mclk, npl, and fsgen
clocks are managed via the Q6PRM. On SC7280-based boards, the TX CORE
clock is used to drive both RX and WSA audio paths following as per
hardware design.

Co-developed-by: default avatarPrasad Kumpatla <quic_pkumpatl@quicinc.com>
Signed-off-by: default avatarPrasad Kumpatla <quic_pkumpatl@quicinc.com>
Signed-off-by: default avatarMohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250903151337.1037246-5-mohammad.rafi.shaik@oss.qualcomm.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent eec852a4

arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi

+61 −0
Original line number Diff line number Diff line
@@ -10,6 +10,67 @@ 
#include <dt-bindings/sound/qcom,q6afe.h>

#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>



&lpass_rx_macro {

	/delete-property/ power-domains;

	/delete-property/ power-domain-names;

	clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK  LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&lpass_va_macro>;

	clock-names = "mclk",

		      "npl",

		      "macro",

		      "dcodec",

		      "fsgen";

};



&lpass_tlmm {

	clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;

	clock-names = "core",

		      "audio";

};



&lpass_tx_macro {

	/delete-property/ power-domains;

	/delete-property/ power-domain-names;

	clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK  LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&lpass_va_macro>;

	clock-names = "mclk",

		      "npl",

		      "macro",

		      "dcodec",

		      "fsgen";

};



&lpass_va_macro {

	/delete-property/ power-domains;

	/delete-property/ power-domain-names;

	clocks = <&q6prmcc LPASS_CLK_ID_VA_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;

	clock-names = "mclk",

		      "macro",

		      "dcodec";

};



&lpass_wsa_macro {

	clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

		 <&lpass_va_macro>;

	clock-names = "mclk",

		      "npl",

		      "macro",

		      "dcodec",

		      "fsgen";

};



&remoteproc_adsp_glink {

	/delete-node/ apr;