Commit d3c9515e authored by Bibo Mao's avatar Bibo Mao Committed by Huacai Chen
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LoongArch: KVM: Add delay until timer interrupt injected 



When timer is fired in oneshot mode, CSR.TVAL will stop with value -1
rather than 0. However when the register CSR.TVAL is restored, it will
continue to count down rather than stop there.

Now the method is to write 0 to CSR.TVAL, wait to count down for 1 cycle
at least, which is 10ns with a timer freq 100MHz, and then retore timer
interrupt status. Here add 2 cycles delay to assure that timer interrupt
is injected.

With this patch, timer selftest case passes to run always.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarBibo Mao <maobibo@loongson.cn>
Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent 37e9d1a9

arch/loongarch/kvm/timer.c

+2 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ 
 */



#include <linux/kvm_host.h>

#include <asm/delay.h>

#include <asm/kvm_csr.h>

#include <asm/kvm_vcpu.h>
@@ -95,6 +96,7 @@ void kvm_restore_timer(struct kvm_vcpu *vcpu) 
		 * and set CSR TVAL with -1

		 */

		write_gcsr_timertick(0);

		__delay(2); /* Wait cycles until timer interrupt injected */



		/*

		 * Writing CSR_TINTCLR_TI to LOONGARCH_CSR_TINTCLR will clear