Commit d3eab504 authored by Sinan Kaya's avatar Sinan Kaya Committed by Vinod Koul
Browse files

dmaengine: qcom_hidma: add a common API to setup the interrupt 



Introducing the hidma_ll_setup_irq function to set up the interrupt
type externally from the OS interface.

Signed-off-by: default avatarSinan Kaya <okaya@codeaurora.org>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent 9da0be80

drivers/dma/qcom/hidma.h

+2 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ struct hidma_tre { 
};



struct hidma_lldev {

	bool msi_support;		/* flag indicating MSI support    */

	bool initialized;		/* initialized flag               */

	u8 trch_state;			/* trch_state of the device	  */

	u8 evch_state;			/* evch_state of the device	  */
@@ -145,6 +146,7 @@ int hidma_ll_disable(struct hidma_lldev *lldev); 
int hidma_ll_enable(struct hidma_lldev *llhndl);

void hidma_ll_set_transfer_params(struct hidma_lldev *llhndl, u32 tre_ch,

	dma_addr_t src, dma_addr_t dest, u32 len, u32 flags);

void hidma_ll_setup_irq(struct hidma_lldev *lldev, bool msi);

int hidma_ll_setup(struct hidma_lldev *lldev);

struct hidma_lldev *hidma_ll_init(struct device *dev, u32 max_channels,

			void __iomem *trca, void __iomem *evca,

drivers/dma/qcom/hidma_ll.c

+23 −4
Original line number Diff line number Diff line
@@ -680,17 +680,36 @@ int hidma_ll_setup(struct hidma_lldev *lldev) 
	writel(HIDMA_EVRE_SIZE * nr_tres,

			lldev->evca + HIDMA_EVCA_RING_LEN_REG);



	/* support IRQ only for now */

	/* configure interrupts */

	hidma_ll_setup_irq(lldev, lldev->msi_support);



	rc = hidma_ll_enable(lldev);

	if (rc)

		return rc;



	return rc;

}



void hidma_ll_setup_irq(struct hidma_lldev *lldev, bool msi)

{

	u32 val;



	lldev->msi_support = msi;



	/* disable interrupts again after reset */

	writel(0, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG);

	writel(0, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);



	/* support IRQ by default */

	val = readl(lldev->evca + HIDMA_EVCA_INTCTRL_REG);

	val &= ~0xF;

	val |= 0x1;

	if (!lldev->msi_support)

		val = val | 0x1;

	writel(val, lldev->evca + HIDMA_EVCA_INTCTRL_REG);



	/* clear all pending interrupts and enable them */

	writel(ENABLE_IRQS, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG);

	writel(ENABLE_IRQS, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);



	return hidma_ll_enable(lldev);

}



struct hidma_lldev *hidma_ll_init(struct device *dev, u32 nr_tres,